Standby Leakage Current Reduction Circuit for Semiconductor Memory
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Solution Overview
Problem
Conventional semiconductor memory devices fail to effectively reduce standby leakage current, leading to data loss and excess power consumption due to variations in temperature, external power source voltage, and fabrication process variations, known as process scatter.
Innovation Solution
A standby leakage current reduction circuit that includes a bias signal generator and a ground voltage controller, which adjusts the voltage level on the virtual ground terminal based on temperature and process information to minimize standby leakage current, thereby reducing excess power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the semiconductor memory device operates in standby mode for a relatively long amount of time, then the power consumption is reduced by entering deep power down mode, but standby leakage current still causes data loss and excess power consumption due to variations in temperature, external power source voltage, and fabrication process variations
Solution Approach 1:
The patent applies dynamics by making the virtual ground voltage adjustable rather than fixed. The ground voltage controller dynamically changes the virtual ground voltage level based on detected conditions (temperature, power source voltage, process variations) to optimize the balance between reducing standby leakage current and preventing data loss. This dynamic adjustment allows the system to adapt to varying operating conditions and eliminate the trade-off between power saving and data reliability.
Solution Approach 2:
The patent changes the parameter of virtual ground voltage to reduce standby leakage current. By adjusting the virtual ground voltage level as a controllable parameter, the system can minimize leakage current while maintaining data integrity. The ground voltage controller modifies this parameter based on detected conditions, transforming a static design into a adaptive one that optimizes performance across different operating scenarios.
2Loss of energy
If the virtual ground voltage is fixed, then the circuit is simple, but standby leakage current cannot be effectively reduced due to variations in temperature and process scatter
Solution Approach 1:
The patent implements feedback by using a detector to monitor operating conditions (temperature, power source voltage) and feeding this information back to the ground voltage controller. This feedback mechanism enables the system to automatically adjust the virtual ground voltage in response to actual conditions, reducing standby leakage current without requiring complex manual intervention or overly complicated circuit architecture. The feedback loop provides intelligent control that optimizes energy efficiency.
3Use of energy by stationary object
If the virtual ground voltage is adjusted to reduce standby leakage current, then power consumption is reduced, but the circuit complexity increases due to the need for detection and control mechanisms
Solution Approach 1:
The patent applies self-service by designing the system to automatically detect and adjust virtual ground voltage without external intervention. The detector and ground voltage controller work together to autonomously optimize power consumption based on real-time conditions. This self-service capability reduces the need for complex external control systems or manual configuration, achieving energy efficiency through intelligent autonomous operation.
Data Source
AI summary
Embodiments of the invention provide a standby leakage current reduction circuit and a semiconductor memory device comprising the standby leakage current reduction circuit. The invention provides a circuit adapted to reduce standby leakage current in a semiconductor memory device comprising memory cells. The circuit comprises a bias signal generator adapted to generate a bias signal, wherein a voltage level of the bias signal is set in accordance with a result of a standby leakage current test. The circuit further comprises a ground voltage controller adapted to receive the bias signal from the bias signal generator and to control a level of a voltage apparent on a virtual ground terminal in response to the bias signal while the semiconductor memory device is in a standby mode.