Voltage Supply Circuit with Mode-Switched Standby Regulator Output

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Solution Overview

Problem

Existing low drop-out regulators (LDOs) face challenges in minimizing their influence on active mode operations due to their slow response, requiring a target voltage lower than the active mode operation voltage only in active mode.

Innovation Solution

A voltage supply circuit that includes a signal generation circuit to generate active and standby mode enable signals, an active voltage regulator to output an active mode operation voltage, and a standby voltage regulator that outputs a standby mode operation voltage while maintaining a voltage lower than the standby mode operation voltage during active mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the standby voltage regulator operates in standby mode with a target voltage set low, then the response speed is slow, but in active mode the target voltage must be lowered to minimize influence on the circuit

Engineering Contradiction:
Improveresponse speedVSAvoidinfluence on active mode circuit operation
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The standby voltage regulator dynamically adjusts its target voltage based on the operational mode. In standby mode, it operates with a lower target voltage to achieve faster response speed. In active mode, it switches to a higher target voltage matching the active voltage regulator's output, thereby minimizing circuit influence. This dynamic adjustment resolves the contradiction between response speed and circuit interference.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the target voltage parameter of the standby voltage regulator according to the operational mode. By switching between different target voltage values (lower for standby, higher for active mode), the system optimizes both response speed and minimizes harmful effects on circuit operation in different modes.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the standby voltage regulator maintains a constant target voltage, then the circuit design is simple, but it cannot minimize influence on the active mode operation

Engineering Contradiction:
Improvevoltage regulator control circuitVSAvoidinterference with active mode
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The control circuit dynamically switches the target voltage setting based on mode selection signals. This dynamic control adds minimal complexity while effectively resolving the interference issue, as the circuit only needs to switch between two predefined voltage levels rather than implementing complex continuous regulation.

Inventive Principle:
Principle #15Dynamics

3Device complexity

If the standby voltage regulator operates independently without mode coordination, then the control logic is simple, but it causes voltage conflicts during mode transitions

Engineering Contradiction:
Improvecontrol logicVSAvoidvoltage supply stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The invention implements feedback control where the mode selection signal (generated from chip selection and reset signals) feeds back to adjust the standby voltage regulator's target voltage. This feedback mechanism ensures that the standby regulator's output matches the active regulator's output during active mode, preventing voltage conflicts and ensuring stable transitions between modes.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12265410B2Voltage supply circuit with a voltage regulator
Publication Date: 2025.04.01 SK HYNIX INC
  • US12265410B2 patent drawing
  • US12265410B2 patent drawing
  • US12265410B2 patent drawing

AI summary

The present technology relates to a voltage supply circuit, and the voltage supply circuit according to the present technology includes a signal generation circuit configured to generate an active mode enable signal according to a chip selection signal provided from an external device, and generate a standby mode enable signal using an external voltage provided from the external device, an active voltage regulator configured to receive the active mode enable signal and output an active mode operation voltage when the active mode enable signal is in a high state, and a standby voltage regulator configured to receive the active mode enable signal and the standby mode enable signal, output a standby mode operation voltage while the standby mode enable signal is in the high state, and output a voltage lower than the standby mode operation voltage when the active mode enable signal is in the high state.