Memory-Based State Machine for Complex Digital Signal Triggering

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Solution Overview

Problem

Conventional integrated logic analyzers lack the capability to support complex trigger and capture schemes for observing complex digital circuit operations, requiring additional custom combinatorial logic and software.

Innovation Solution

A memory-based state machine integrated into the digital circuit combines trigger and capture functionalities, utilizing trigger combination blocks and counters/comparators to implement both simple and complex schemes without additional logic.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional integrated logic analyzers use programmable combinatorial logic for trigger and capture functionalities, then the device complexity is reduced and ease of manufacture is improved, but the adaptability to support complex trigger and capture schemes deteriorates

Engineering Contradiction:
Improvecapability to support complex trigger and capture schemesVSAvoidadditional custom combinatorial logic and software
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a unified state machine that serves multiple functions: it processes trigger conditions, manages capture operations, and controls memory storage all through a single reconfigurable structure. This state machine can be programmed to handle both simple and complex trigger/capture schemes without requiring separate dedicated logic circuits for each function, thereby achieving versatility without proportional increases in device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs a reconfigurable state machine that can dynamically change its behavior based on programmed instructions. The state machine's transition logic and output mappings can be modified to support different trigger and capture schemes, allowing the system to adapt to complex observation requirements while maintaining a fixed hardware architecture that avoids the need for additional custom logic

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If additional custom combinatorial logic is added to support complex schemes, then the adaptability is improved, but the device complexity and difficulty of manufacture increase

Engineering Contradiction:
Improvesupport for complex observation schemesVSAvoidadditional custom logic and software requirements
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

By designing a universal state machine architecture that can be programmed to perform different trigger and capture functions, the patent eliminates the need for multiple custom logic circuits. The same hardware structure handles diverse observation schemes through configuration rather than physical modification, significantly improving ease of manufacture while maintaining high adaptability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent achieves different trigger and capture behaviors by changing the parameters and configuration of the state machine rather than modifying the hardware structure. The state transition table and output mappings can be reprogrammed to support various complex schemes, allowing adaptability without increasing manufacturing complexity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8332697B1Method and apparatus for triggering and capturing digital circuit signals
Publication Date: 2012.12.11 XILINX INC
  • US8332697B1 patent drawing
  • US8332697B1 patent drawing
  • US8332697B1 patent drawing

AI summary

In one embodiment, a method and apparatus for triggering and capturing digital circuit signals are disclosed. For example, a logic analyzer according to one embodiment includes at least one trigger combination block and a state machine deploy in a memory coupled to the trigger combination block, where the state machine includes an input coupled to an output of the trigger combination block and an output coupled to a capture memory in which one or more digital circuit signals are stored.