Static Timing Analysis for Multi-Condition Path Screening
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Solution Overview
Problem
The increasing complexity of 2.5D and 3D chips leads to a significant burden on circuit analysis due to the large number of operating conditions required, affecting computing performance and time.
Innovation Solution
Perform static timing analysis on a circuit model to select signal paths violating timing constraints, obtain timing information, and calculate a timing reference value based on a first threshold to simplify the analysis process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If comprehensive timing analysis is performed under all operating conditions to ensure design reliability, then timing constraint verification is improved, but analysis time and computational resources increase significantly
Solution Approach 1:
The patent segments the comprehensive timing analysis into two distinct phases: (1) an initial STA phase that identifies violating signal paths under all operating conditions, and (2) a focused re-analysis phase that only examines the identified violating paths. This segmentation reduces the overall analysis time by avoiding redundant checks on non-violating paths while maintaining verification reliability.
Solution Approach 2:
The patent applies partial action by performing complete timing analysis initially to ensure no violations are missed, then using the results to guide a second, more targeted analysis that focuses only on the necessary portions (violating paths). This approach balances thoroughness with efficiency by doing excessive analysis only where needed.
2Reliability
If static timing analysis is performed under multiple operating conditions to ensure comprehensive coverage, then timing constraint verification is improved, but device complexity and computational burden increase
Solution Approach 1:
The patent extracts the critical information (violating signal paths) from the comprehensive multi-condition STA results, separating the essential violation data from the redundant non-violating path information. This extraction reduces computational burden by focusing subsequent analysis only on the extracted violating paths rather than re-processing all paths under all conditions.
Solution Approach 2:
The patent performs preliminary STA under multiple operating conditions to identify violating signal paths before conducting the final verification. This preliminary action prepares the analysis by pre-filtering the signal paths, so that the subsequent detailed verification only needs to focus on the identified violators, reducing overall computational complexity.
3Reliability
If all signal paths are analyzed under all operating conditions to ensure complete timing verification, then design reliability is improved, but productivity and analysis efficiency decrease
Solution Approach 1:
The patent divides the timing verification process into two segments: an initial comprehensive STA that identifies violating paths, and a second targeted re-analysis that verifies only those violating paths. This segmentation maintains verification completeness by ensuring all violating paths are caught initially, then improves productivity by avoiding redundant verification of non-violating paths in the second pass.
Solution Approach 2:
The patent uses partial action in the second analysis pass by performing timing verification only on the subset of signal paths that were identified as violating in the first pass. This partial re-analysis maintains reliability for the critical violating paths while significantly improving overall analysis efficiency by skipping non-violating paths.
Data Source
AI summary
An analysis method and an analysis device are provided. The analysis method includes the following. A static timing analysis is performed on a circuit model under test to select multiple selected signal paths violating timing constraints in the circuit model under test. Multiple timing information of each of the selected signal paths respectively under multiple operating conditions are obtained. Multiple selected timing information are selected from the timing information according to a first threshold, and a timing reference value corresponding to each of the operating conditions is calculated according to the selected timing information.