Static Verify-Read Data Path for Non-Volatile Memory Sense Amplifiers
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Solution Overview
Problem
Existing non-volatile memory technologies, such as flash memories, face challenges with the use of tristateable drivers for verify-read operations, which require timed control signals, occupy large surface areas, and do not allow symmetrical sense amplifiers, affecting performance and cost.
Innovation Solution
A non-volatile memory design with a static verify-read output data path that eliminates the need for tristateable drivers by using a continuous verify data line and logic circuits, allowing simultaneous normal read and verify-read operations, reducing control signals and device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a tristateable driver is used for verify-read operations, then verify-read functionality is achieved, but control signal overhead increases and device size increases
Solution Approach 1:
The patent extracts the verify-read data path from the normal read path by using a separate verify data line that is always driven by the sense amplifier output. This eliminates the need for tristateable drivers and their associated control signals, reducing control signal overhead while maintaining verify-read functionality.
Solution Approach 2:
Instead of using a tristateable driver that requires active control signals to enable/disable output driving, the patent inverts the approach by using a static data line that is continuously driven. The verify-read operation is achieved by selectively enabling the sense amplifier to drive the verify data line, eliminating the need for complex tristate control logic.
2Adaptability or versatility
If a tristateable driver is used for verify-read operations, then verify-read functionality is achieved, but device surface area increases
Solution Approach 1:
The patent removes the tristateable driver circuitry from the device by extracting it entirely and replacing it with a simpler static data line configuration. This elimination of complex driver circuits directly reduces the device surface area while preserving verify-read functionality through the sense amplifier's direct drive capability.
3Adaptability or versatility
If a tristateable driver is used for verify-read operations, then verify-read functionality is achieved, but symmetrical sense amplifier layout is prevented
Solution Approach 1:
The patent extracts the compatibility requirement between tristateable drivers and sense amplifier layouts, eliminating the constraint that prevented symmetrical layouts. By using a static data line driven directly by the sense amplifier without intermediate tristateable drivers, the design enables fully symmetrical sense amplifier configurations that are easier to manufacture and optimize.
Data Source
AI summary
A memory has first and second memory arrays and first and second sense amplifiers coupled to the first and second memory arrays, respectively. A verify data line is coupled to first outputs of the first sense amplifier and the second sense amplifier as well as to a program/erase controller. The verify data line has a first logic circuit having a first input coupled to the first output of the first sense amplifier and an output. A second logic circuit has a first input coupled to the output of the first logic circuit, a second input coupled to the first output of the second sense amplifier, and an output. A global data line is coupled to a second output of the first sense amplifier and a second output of the second sense amplifier. A global sense amplifier is coupled to the global data line.