Power Supply Voltage Step-Down Circuit for Delay Time Stability
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Solution Overview
Problem
Semiconductor devices face challenges in maintaining stable operation due to variations in delay times caused by manufacturing conditions, particularly transistor threshold voltage variations, which existing power supply voltage step-down circuits are unable to fully correct, resulting in significant delays in internal circuits.
Innovation Solution
A power supply voltage step-down circuit that generates a reference voltage by adding an offset voltage and a manufacturing variation-dependent voltage, then multiplies this reference voltage by a positive number, using a differential amplifier and diode-connected transistors to produce a stable power supply voltage for delay circuits, thereby correcting delay time variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a step-down low voltage is used as internal power supply voltage, then power consumption is reduced, but delay times of internal circuits widely vary in response to variation in manufacturing conditions
Solution Approach 1:
The invention changes the power supply voltage parameter dynamically based on manufacturing conditions. Specifically, it adjusts the internal power supply voltage level according to the threshold voltage characteristics of transistors in the delay circuit, thereby compensating for manufacturing variations and stabilizing delay times while maintaining reduced power consumption.
Solution Approach 2:
The invention implements a feedback mechanism that detects the threshold voltage of transistors in the delay circuit and uses this information to adjust the internal power supply voltage. This feedback loop ensures that delay time variations due to manufacturing conditions are compensated, maintaining reliable operation at lower power consumption levels.
2Use of energy by moving object
If the internal power supply voltage is stepped down to low voltage, then power efficiency improves, but synchronization among internal circuits cannot be established
Solution Approach 1:
The invention adjusts the internal power supply voltage parameter based on detected transistor threshold voltage characteristics. By dynamically setting the voltage level to compensate for manufacturing variations, it maintains stable delay times and ensures synchronization among internal circuits while operating at efficient low voltage levels.
3Device complexity
If conventional power supply voltage step-down circuit is used, then circuit complexity is reduced, but delay time variation due to manufacturing variation remains significant
Solution Approach 1:
The invention adds a feedback mechanism that detects transistor threshold voltage and adjusts the internal power supply voltage accordingly. This feedback approach compensates for manufacturing variations in delay circuits without requiring complete redesign of the power supply step-down circuit, achieving improved delay time consistency with moderate complexity increase.
Solution Approach 2:
The power supply voltage step-down circuit automatically adjusts its output voltage based on detected transistor characteristics. The system performs self-correction by using the detected threshold voltage information to set the appropriate internal power supply voltage, eliminating the need for external manual adjustment and achieving manufacturing variation compensation autonomously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces delay time variations by up to 1% across different manufacturing conditions, ensuring stable operation of semiconductor devices by compensating for variations in transistor characteristics.
Implementation Method 1
A differential amplifier 62 converts the reference voltage Vref to produce a low-impedance step-down voltage as an internal power supply voltage Vdd
Implementation Method 2
a diode-connected PMOS transistor 72...the differential amplifier 73 produces an output voltage given by (Vi+Vtn+Vtp) and supplied as an internal power supply voltage. Thus, the internal power supply voltage is higher than the reference voltage Vi by the transistor threshold voltage Vtn of the NMOS transistor 71 plus the transistor threshold voltage Vtp of the PMOS transistor 72
Data Source
AI summary
A delay circuit has a circuit structure dominated by an NMOS or a PMOS transistor. The delay circuit is supplied with, as a power supply voltage, an output voltage of a power supply voltage step-down circuit having a level generating circuit for generating a reference voltage obtained by an offset voltage and a manufacturing variation dependent voltage, and an m-time voltage generating circuit. A semiconductor device includes the delay circuit.