Stepped Contact Structures in 3D Nonvolatile Memory
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Solution Overview
Problem
Conventional 3-D semiconductor devices face limitations in reducing memory cell size and increasing integration density due to the complexity and time-consuming processes involved in forming stepped structures, particularly with thick mask patterns required for etching multiple layers, which increases the number of etch processes and exposure time.
Innovation Solution
The proposed solution involves forming stack groups with alternately stacked first and second material layers, where stepped structures are created simultaneously using a reduced number of etch processes, reducing the thickness and number of mask patterns needed, and incorporating dummy contact structures to mitigate dishing phenomena during polishing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If thick mask patterns are used for etching multiple layers, then the etching process can penetrate through all layers, but the number of etch processes and exposure time increase
Solution Approach 1:
The patent divides the mask pattern formation into multiple thinner mask patterns applied sequentially to different regions, rather than using one thick mask pattern. Each thin mask pattern is exposed and developed separately, allowing the etching process to penetrate through multiple layers without requiring excessive thickness in a single mask layer, thereby reducing exposure time while maintaining etching effectiveness.
2Manufacturing precision
If the number of etch processes is increased to form stepped structures, then the stepped structures can be formed with higher precision, but the manufacturing complexity and time increase
Solution Approach 1:
The patent combines multiple etching operations into a single etch process by using multiple thin mask patterns that are exposed and developed in sequence. Instead of performing separate etch processes for each stepped region, the method allows one etch process to create multiple stepped structures simultaneously by sequentially applying mask patterns to different areas, thereby reducing the total number of processes while maintaining precision.
3Reliability
If conventional stepwise patterning is used to form contact regions, then contact plugs can be coupled to gate lines, but the process is time-consuming and complex
Solution Approach 1:
The patent applies mask patterns to specific regions before the etching process begins, preparing the structure in advance. By sequentially exposing and developing mask patterns on different regions prior to etching, the method pre-defines the stepped structure geometry, allowing the subsequent etch process to efficiently create the contact regions without requiring complex stepwise patterning operations during etching.
Data Source
AI summary
A nonvolatile memory device includes a substrate including a cell region, contact regions and dummy contact regions. The contact regions and the dummy contact regions alternately are disposed. A plurality of word lines stacked at the cell region of the substrate and contact groups stacked at the contact regions and the dummy contact regions of the substrate. The contact groups include a plurality of pad layers being coupled to the word lines, and each of the contact groups has stepped structure disposed at a corresponding contact region.