High Voltage Semiconductor Device With Stepped Drift Region

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Solution Overview

Problem

Conventional high voltage semiconductor devices have high ON-resistance due to a lengthened current path and increased operation resistance, which deteriorates their performance.

Innovation Solution

A high voltage semiconductor device with a semiconductor substrate featuring a p-type first region, a lower n-type second region, and a sloped n-type drift region, along with a field plate and gate insulating layer, where the gate electrode extends to the top surface of the field plate, reducing the current path length and ON-resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a long channel and n-type drift region are used to secure breakdown voltage, then the breakdown voltage is improved, but the ON-resistance increases and operation performance deteriorates

Engineering Contradiction:
Improvebreakdown voltageVSAvoidON-resistance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a stepped structure with different height levels (first level, second level, and intermediate level) to create a three-dimensional current path. This dimensional change allows the current to flow through multiple levels rather than a single plane, effectively shortening the horizontal current path length and reducing ON-resistance while maintaining the vertical breakdown voltage through the drift region.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The drift region is divided into multiple segments at different height levels (first drift region at first level, second drift region at second level, third drift region at intermediate level). This segmentation creates multiple current path segments that collectively shorten the overall current path while maintaining adequate breakdown voltage through the stacked structure.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the channel length is increased to secure breakdown voltage, then the breakdown voltage is improved, but the device surface area increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddevice surface area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

By transitioning from a two-dimensional planar structure to a three-dimensional stepped structure, the patent achieves longer effective channel length for breakdown voltage in the vertical dimension while keeping the horizontal footprint compact. The gate electrode extends across multiple levels, utilizing vertical space to improve breakdown voltage without proportionally increasing surface area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The stepped structure nests multiple drift region segments at different height levels within a compact horizontal footprint. Each level is positioned to optimize the current path while maintaining overall device compactness, effectively nesting functional regions vertically to reduce surface area requirements.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS7573100B2High voltage semiconductor device and method for fabricating the same
Publication Date: 2009.08.11 DONGBU HITEK CO LTD
  • US7573100B2 patent drawing
  • US7573100B2 patent drawing
  • US7573100B2 patent drawing

AI summary

There is provided a high voltage semiconductor device comprising: a semiconductor substrate of a first conductivity type, including a first region, a second region relatively lower than the first region, and a sloped region between the first region and the second region; a drift region of a second conductivity type, formed on the second region; a source region of the second conductivity type, disposed on the first region, and spaced apart from the drift region by the sloped region; a drain region of the second conductivity type, disposed on the drift region; a field plate positioned on the drift region in the second region; a gate insulating layer disposed between the source region and the drift region; and a gate electrode layer, which is disposed on the gate insulating layer and extends to above the field plate.