Stepped Interposer Surface for Underfill Crack Resistance

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Solution Overview

Problem

Mechanical stress in underfill materials between an interposer and a semiconductor die leads to cracking and delamination, which can cause package failure, especially in larger packages.

Innovation Solution

The interposer is formed with a stepped surface that includes a frame-shaped horizontally-extending surface to reduce contact area with the underfill material, using a molding compound die frame to mitigate mechanical stress and prevent delamination and cracking during thermal cycling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the interposer uses a flat surface to contact the underfill material, then the contact area is maximized for structural support, but mechanical stress concentrates leading to cracking and delamination

Engineering Contradiction:
Improvestructural supportVSAvoidresistance to cracking and delamination
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The interposer surface is designed with non-uniform characteristics: a first planar surface for die attachment and a stepped surface with horizontal and non-horizontal portions for underfill contact. This local differentiation allows the interposer to provide structural support where needed while reducing stress concentration in areas prone to cracking, thereby simultaneously achieving strength and reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The interposer transitions from a two-dimensional flat surface to a three-dimensional stepped surface with multiple levels and angles. The non-horizontal surfaces introduce vertical dimensionality that redistributes mechanical stress across different planes, reducing stress concentration and preventing delamination while maintaining structural integrity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the contact area between interposer and underfill material is reduced to mitigate stress, then cracking and delamination are suppressed, but structural support is compromised

Engineering Contradiction:
Improveresistance to cracking and delaminationVSAvoidstructural support
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The stepped surface design creates zones with different contact characteristics: the horizontal portion provides adequate contact area for structural support, while the non-horizontal portions reduce stress concentration. This local quality differentiation allows the system to maintain both reliability and structural strength simultaneously.

Inventive Principle:
Principle #3Local quality

3Reliability

If a stepped surface is introduced to reduce mechanical stress, then reliability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveresistance to cracking and delaminationVSAvoidinterposer surface geometry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The stepped surface is segmented into distinct horizontal and non-horizontal portions, each serving specific functions. This segmentation allows for modular manufacturing approaches and simplifies the fabrication process compared to creating entirely complex three-dimensional surfaces, thereby reducing manufacturing complexity while maintaining reliability benefits.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250316546A1Interposer including stepped surfaces and methods of forming the same
Publication Date: 2025.10.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250316546A1 patent drawing
  • US20250316546A1 patent drawing
  • US20250316546A1 patent drawing

AI summary

A semiconductor structure includes an interposer having a first planar surface, a set of non-horizontal surfaces having a top periphery that are adjoined to a periphery of the first planar surface, and a frame-shaped surface adjoined to a bottom periphery of the set of non-horizontal surfaces, sidewalls adjoined to the frame-shaped surface, and a second planar surface adjoined to the sidewalls; at least one semiconductor die attached to the interposer through a respective array of solder material portions; and an underfill material portion located between the interposer and the at least one semiconductor die and contacting a portion of the first planar surface.