Stepped Nanosheet Epitaxy Layout for Monolithic 3D FETs
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving miniaturization, higher speed, greater bandwidth, lower power consumption, and lower latency due to complex chip layout requirements in producing semiconductor dies with increased integration density, particularly in constructing monolithic stacked and stepped nanosheet field effect transistors (FETs).
Innovation Solution
The solution involves forming separate epitaxial regions in a stepped nanosheet structure with a sacrificial material to create a stepped configuration, allowing for the growth of epitaxial layers with varying volumes and spatial relationships, enabling the formation of contacts to these regions while maintaining isolation and efficient layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If monolithic stacked nanosheet FETs are constructed to increase integration density, then integration density is improved, but chip layout complexity increases
Solution Approach 1:
The patent divides the epitaxial structure into separate regions corresponding to different nanosheet stacks, allowing each stack to be processed and configured independently. This segmentation enables complex 3D stacking arrangements while maintaining manageable layout processes for each individual stack.
Solution Approach 2:
The patent transitions from planar 2D chip layouts to three-dimensional stacked architectures by forming nanosheet stacks at different vertical levels. This dimensional change increases integration density by utilizing the vertical dimension while the separate epitaxial regions help manage the complexity through modular construction.
2Manufacturing precision
If epitaxial regions are grown separately to enable stepped nanosheet formation, then manufacturing precision is improved, but process complexity increases
Solution Approach 1:
The patent performs preliminary epitaxial growth to form separate regions before constructing the nanosheet stacks. This preliminary action establishes precise stepped formations early in the process, enabling subsequent stacking operations to proceed with higher precision while the modular approach keeps overall process complexity manageable.
Solution Approach 2:
The separate epitaxial regions serve as intermediary structures that facilitate the formation of stepped nanosheet configurations. These intermediary regions provide well-defined starting points and templates for subsequent nanosheet construction, improving precision while allowing the complex stepped structure to be built through sequential, manageable steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the separate growth and isolation of epitaxial regions, achieving a stepped nanosheet structure that enhances integration density and layout complexity, thereby addressing the challenges of miniaturization and performance demands in semiconductor devices.
Implementation Method 1
a first epitaxial growth formed adjacent the semiconductor layers of the first nanosheet stack, and a second epitaxial growth formed adjacent the semiconductor layers of the second nanosheet stack
Data Source
AI summary
A semiconductor structure is presented including semiconductor layers of a first nanosheet stack, semiconductor layers of a second nanosheet stack formed over and having a stepped nanosheet formation with respect to the semiconductor layers of the first nanosheet stack, a first epitaxial growth formed adjacent the semiconductor layers of the first nanosheet stack, and a second epitaxial growth formed adjacent the semiconductor layers of the second nanosheet stack such that the second epitaxial growth has a stepped formation with respect to the first epitaxial growth. The second epitaxial growth has a volume greater than a volume of the first epitaxial growth.