Stepped Pad Structure for Stable Thin Stacked Semiconductor Packages
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Solution Overview
Problem
There is a challenge in developing semiconductor packages that balance increasing functionality and miniaturization with the need for reduced thickness, while maintaining stability and preventing short circuits due to the increased complexity of stacked semiconductor chips.
Innovation Solution
The semiconductor package design incorporates a stepped pad structure with a first portion and a second portion on the pads, where the second portion protrudes vertically and is narrower, and a solder ball surrounds the sidewall of the second portion, enhancing stability and preventing short circuits by improving the positioning of solder balls between pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple semiconductor chips are integrated into one package to achieve high-capacity and multifunctionality, then the functionality and capacity of the semiconductor package are improved, but the device complexity and difficulty of preventing short circuits increase
Solution Approach 1:
The pad structure is segmented into a first pad portion and a second pad portion with different functions. The first pad portion provides electrical connection through solder balls, while the second pad portion provides mechanical support and positioning. This segmentation allows the package to achieve high functionality through multi-chip integration while managing complexity by assigning specific roles to different pad regions.
Solution Approach 2:
The second pad portion is positioned within the horizontal projection area of the first pad portion, creating a nested structure. The solder ball surrounds the second pad portion, forming another nested layer. This nested arrangement allows multiple chips to be stacked vertically with efficient space utilization, improving functionality while maintaining a compact package structure that simplifies overall design.
2Length of stationary object
If the thickness of semiconductor packages is decreased to make electronic devices slimmer, then the portability and compactness are improved, but the stability and reliability of electrical connections deteriorate
Solution Approach 1:
The pad structure transitions from a conventional two-dimensional flat configuration to a three-dimensional stepped configuration with vertical height differences. The second pad portion protrudes vertically from the first pad portion, creating a stepped structure that utilizes the vertical dimension. This dimensional change allows the package to maintain reduced thickness while improving connection stability through the vertical profile of the pads and surrounding solder balls.
Solution Approach 2:
The pad structure parameters are changed by creating a stepped configuration where the second pad portion has different height and horizontal projection area compared to the first pad portion. This parameter change transforms the flat pad into a three-dimensional structure that enhances mechanical interlocking and electrical connection reliability, compensating for the reduced package thickness.
3Reliability
If a stepped pad structure with protruding second portion is used to improve positioning and prevent short circuits, then the reliability is improved, but the manufacturing complexity increases
Solution Approach 1:
The stepped pad structure is formed as a pre-configured feature on the substrate before chip mounting. The first and second pad portions are created in advance with the appropriate stepped geometry, and solder balls are pre-positioned to surround the second pad portion. This preliminary action simplifies the overall manufacturing process by eliminating the need for complex post-assembly adjustments, despite the increased complexity of the pad formation step itself.
Data Source
AI summary
A semiconductor package including a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip, and a third semiconductor chip disposed on the second semiconductor chip. A first pad is disposed on a top surface of the second semiconductor chip, and includes a first portion and a second portion protruding in a vertical direction from the first portion. A width of the first portion in a first horizontal direction is greater than a width of the second portion in the first horizontal direction. A second pad is disposed on a bottom surface of the third semiconductor chip facing the top surface of the second semiconductor chip, and a solder ball is disposed as surrounding a sidewall of the second portion of the first pad between the first pad and the second pad.