Stepped Passivation Bump Structure to Constrain Solder Flow
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The packaging process of semiconductor structures is prone to defects due to solder layer deformation or flow, leading to short circuits, which compromises the reliability and functionality of the semiconductor structures.
Innovation Solution
A semiconductor structure with a barrier layer featuring stacked sub-barrier layers forming steps within an opening, where the step heights decrease sequentially, containing a solder layer and adhesive layer, which reduces the fluidity of the adhesive and guides its flow to enhance bonding strength and prevent short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a solder layer is used to make electrical connection between chip and carrier layer, then electrical connection is achieved, but the solder layer may deform or flow causing short circuit defects
Solution Approach 1:
The barrier layer is divided into multiple sub-barrier layers (first, second, third sub-barrier layers) stacked at different positions. Each sub-barrier layer segments the potential flow path of the solder and adhesive, creating multiple barriers that prevent short circuits while maintaining electrical connection reliability.
Solution Approach 2:
The barrier layer structure acts as an intermediary between the solder layer and the surrounding environment. It controls and regulates the behavior of the solder and adhesive layers, preventing harmful flow while allowing necessary electrical connection functions to occur.
2Strength
If adhesive layer is applied to cover solder layer, then bonding is achieved, but adhesive layer may rush solder layer out of opening during flow process
Solution Approach 1:
The first sub-barrier layer is formed preliminarily before the solder and adhesive layers are applied. This pre-formed barrier structure is positioned to prevent the adhesive from rushing the solder out of the opening during the bonding process, addressing the problem before it occurs.
Solution Approach 2:
The sub-barrier layers serve as intermediary structures between the adhesive layer and the solder layer. They control the interaction between these two materials, allowing bonding to occur while preventing the adhesive from displacing the solder from its proper position.
3Quantity of substance
If adhesive layer fills opening, then bonding is achieved, but pores may form in adhesive layer reducing density
Solution Approach 1:
Different sub-barrier layers are positioned at different locations within and around the opening to address local quality issues. The first sub-barrier layer is at the bottom to prevent pore formation, while other layers are positioned to control adhesive flow locally, ensuring proper density throughout the adhesive layer.
Solution Approach 2:
The sub-barrier layers are formed in advance before adhesive layer application. This preliminary structure guides the adhesive flow and prevents pore formation during the bonding process, ensuring proper density and manufacturing precision.
Data Source
AI summary
A semiconductor structure and a method of fabricating the semiconductor structure are disclosed. The semiconductor structure includes: a carrying layer, a barrier layer, a solder layer and an adhesive layer. The barrier layer is located on the surface of the carrying layer, and there are openings in the barrier layer. The barrier layer includes multiple sub-barrier layers in a stack. The multiple sub-barrier layers respectively form a plurality of steps in the opening, and the heights of the plurality of steps decrease sequentially in a direction from outside of the opening to inside of the opening. A solder layer and an adhesive layer are located in the opening, and the adhesive layer covers the solder layer.