Stepped Memory Stack Contact Layout for Precise Peripheral Connection
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Solution Overview
Problem
There is a need for high integration and large capacity nonvolatile semiconductor memory devices to support the increasing demand for portable electronic devices, with existing technologies facing challenges in enhancing operational reliability and structural efficiency.
Innovation Solution
A semiconductor memory device with a stack structure comprising alternately stacked insulating and conductive patterns, featuring a stepped structure and peripheral contact structures that electrically connect to peripheral transistors, along with a manufacturing method that forms these structures to improve connectivity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional connection structure between peripheral transistors and conductive patterns is used, then the device complexity is higher, but the manufacturing precision and reliability are reduced
Solution Approach 1:
The connection structure is segmented into distinct functional regions: the peripheral contact structure is divided into a first contact portion embedded in the insulating layer and a second contact portion extending to contact the conductive pattern. This segmentation allows independent optimization of each portion's formation process and contact alignment, thereby improving manufacturing precision while managing device complexity through modular design
Solution Approach 2:
The peripheral contact structure extends in the vertical dimension through the insulating layer to establish contact, rather than relying solely on planar connections. This dimensional transition allows the contact structure to bridge different levels (peripheral transistor region to stack structure region), improving connection precision by utilizing vertical spacing and alignment while the standardized vertical extension process helps manage overall device complexity
2Reliability
If the peripheral contact structure extends through the insulating layer to contact the conductive pattern, then the connection reliability is improved, but the manufacturing process complexity increases
Solution Approach 1:
The insulating layer is formed with a pre-defined opening or region in advance, and the peripheral contact structure is subsequently formed to extend through this pre-prepared path. This preliminary preparation of the insulating layer ensures accurate alignment and reliable contact formation, improving operational reliability while the standardized preliminary patterning process helps control manufacturing complexity
Solution Approach 2:
The peripheral contact structure acts as an intermediary element that bridges the peripheral transistor region and the stack structure region. By introducing this intermediate contact component that extends through the insulating layer, reliable electrical connection is achieved while the contact structure's standardized formation process (as a distinct intermediate element) allows for controlled manufacturing steps
Data Source
AI summary
A semiconductor memory device, and a manufacturing method of the semiconductor memory device, includes a peripheral transistor, a first insulating layer covering the peripheral transistor, a source layer on the first insulating layer, and a stack structure on the source layer. The semiconductor memory device also includes a peripheral contact structure penetrating the stack structure and the source layer, the peripheral contact structure electrically connected to the peripheral transistor. The stack structure includes a stepped structure including a step side surface and a step top surface. The peripheral contact structure is in contact with the step side surface.