Stepped Semiconductor Substrate for Ge-on-Si Dislocation Control

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Solution Overview

Problem

The challenge is to reduce threading dislocation defects in semiconductor devices due to lattice mismatch between silicon and germanium layers, which affects the performance of semiconductor devices when a germanium layer is grown on a large silicon substrate, as existing methods do not effectively manage the strain and dislocation propagation.

Innovation Solution

The solution involves creating a semiconductor substrate with a base layer having protrusions or cavities arranged in specific crystallographic orientations, where an interlayer with a different material is grown on the base layer, forming a hetero-structure that restricts dislocation propagation, thereby reducing threading dislocation defects and enhancing device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a germanium layer is grown on a large silicon substrate to achieve mass-production compatibility, then the substrate size is improved, but threading dislocation defects increase due to lattice mismatch

Engineering Contradiction:
Improvesubstrate sizeVSAvoidthreading dislocation defect level
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The substrate surface is segmented into multiple regions with different heights (terraces) separated by step structures. This segmentation creates discrete growth zones that can independently manage dislocation propagation, preventing the formation of continuous threading dislocation paths across the entire large substrate area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces a vertical dimension to the substrate surface by creating stepped terraces at different heights. This dimensional change transforms the flat two-dimensional growth surface into a three-dimensional stepped structure, allowing dislocations to be confined to specific vertical levels and preventing their propagation through the germanium layer.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If a planar silicon substrate is used to grow germanium layer, then the manufacturing process is simplified, but dislocation propagation is unrestricted leading to high defect levels

Engineering Contradiction:
Improvesubstrate preparation simplicityVSAvoiddislocation defect level
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The stepped substrate structure is prepared in advance before germanium layer growth. This preliminary action creates the dislocation-managing terrain beforehand, so that during subsequent germanium growth, dislocations are automatically constrained by the pre-formed step structures without requiring additional complex processing during the growth phase.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces threading dislocation defects, leading to improved performance and reliability of semiconductor devices by restraining dislocations within the substrate, allowing for the growth of high-quality germanium layers on silicon substrates without compromising device performance.

Implementation Method 1

due to lattice mismatch between a general silicon wafer having a planarized surface and a germanium layer grown thereon, a threading dislocation defect (TDD) level is high

Methodology Applied
Scientific EffectLattice mismatch:

Implementation Method 2

a threading dislocation defect (TDD) level is high, which deteriorates performance of the semiconductor devices made of the germanium layer

Methodology Applied
Scientific EffectDislocation propagation:

Data Source

PatentUS11749526B2Semiconductor substrate and method of manufacturing thereof
Publication Date: 2023.09.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11749526B2 patent drawing
  • US11749526B2 patent drawing
  • US11749526B2 patent drawing

AI summary

A semiconductor substrate includes a first material layer made of a first material and including a plurality of protrusions, and a second material layer made of a second material different from the first material, filling spaces between the plurality of protrusions, and covering the plurality of protrusions. Each of the protrusions includes a tip and a plurality of facets converging at the tip, and adjacent facets of adjacent protrusions are in contact with each other.