Stepped Transfer Gate Structure for CMOS Image Sensor Contact Area
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Solution Overview
Problem
Highly integrated CMOS image sensors face issues with reduced contact area between the transfer gate and photodiode, leading to increased image transfer lag and signal noise due to the smaller size of the transfer gate.
Innovation Solution
A CMOS image sensor design featuring a transfer gate structure with a step shape, including a gate electrode and gate dielectric layer, where the gate electrode has lower, central, and upper portions contacting different impurity layers and an isolation layer, ensuring a wide contact area with the photodiode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transfer gate size is reduced to achieve higher integration, then device integration is improved, but the contact area between transfer gate and photodiode is reduced leading to increased transfer lag and noise
Solution Approach 1:
The transfer gate electrode is designed with a stepped structure having multiple levels (first, second, and third portions) at different heights. This vertical dimensionality allows the electrode to contact the photodiode across multiple surfaces and depths, effectively increasing the contact area without expanding the horizontal footprint, thus resolving the contradiction between high integration and sufficient contact area.
Solution Approach 2:
The transfer gate electrode is segmented into multiple portions (first, second, third portions) at different heights, each contacting different regions of the photodiode. This segmentation allows the single electrode to establish multiple contact points with the photodiode, increasing the total contact area while maintaining a compact structure suitable for high integration.
2Productivity
If the transfer gate size is reduced, then device integration is improved, but image transfer lag increases
Solution Approach 1:
By utilizing the vertical dimension with a stepped electrode structure, the patent increases the contact area between the transfer gate and photodiode without increasing the horizontal device footprint. The larger contact area enables faster charge transfer, reducing image transfer lag while maintaining high device integration.
3Productivity
If the transfer gate size is reduced, then device integration is improved, but signal noise increases
Solution Approach 1:
The stepped electrode structure extends vertically to increase the contact area with the photodiode. This larger contact area improves the signal coupling between the photodiode and transfer gate, reducing signal noise while maintaining the compact form factor required for high device integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances the contact area between the transfer gate and photodiode, reducing image transfer lag and signal noise issues in CMOS image sensors.
Implementation Method 1
a photodiode including a first impurity layer and a second impurity layer sequentially formed on a substrate
Data Source
AI summary
A CMOS image sensor has a photodiode including first and second impurity layers sequentially formed on a substrate, an isolation layer on the second impurity layer, and a transfer gate structure through the second impurity layer. The transfer gate structure contacts a top surface of the first impurity layer and a portion of the second impurity layer and includes a bottom surface having a step shape.