Stochastic Comparator Feedback for Pipeline ADC Gain Error Estimation

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Solution Overview

Problem

Analog front-end (AFE) circuits in pipeline analog-to-digital converters (ADCs) face challenges due to gain errors and memory issues in amplifiers, leading to performance degradation and high power consumption, especially in high-speed operations.

Innovation Solution

The implementation of a stochastic comparator with two comparators and a decision block, along with a XOR gate, using a pseudo random binary sequence (PRBS) signal to generate control and detection signals, which enables improved estimation and correction of gain and memory errors, allowing for the use of an inaccurate amplifier and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If an amplifier with high gain is used in the ADC to improve signal amplification, then the gain error increases causing spurs and performance degradation

Engineering Contradiction:
Improvesignal amplification capabilityVSAvoidgain accuracy
Core Design Contradiction:
PowerVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the digital output of the ADC is converted back to analog and compared with the original analog input signal. The difference (error signal) is used to generate correction codes that compensate for gain errors and memory effects in the amplifier, thereby maintaining measurement precision while using high-gain amplifiers.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces a digital correction mechanism as an intermediary between the amplifier and the final digital output. This correction mechanism processes the error signal and generates correction codes that are added to the digital output, effectively mediating the impact of amplifier imperfections on the final measurement accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the amplifier operates at high speed to improve conversion rate, then memory effects increase causing charge storage from previous cycles

Engineering Contradiction:
Improveconversion speedVSAvoidoutput accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The feedback loop continuously monitors the difference between the converted and original signals, capturing memory effects that occur during high-speed operation. The correction codes generated from this feedback compensate for charge storage from previous cycles, maintaining output accuracy even at high conversion rates.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system uses its own output to generate correction information. By converting the digital output back to analog and comparing it with the input, the system self-diagnoses memory effects and generates appropriate correction codes without requiring external calibration or intervention.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If a precise amplifier is used to reduce gain error and memory effects, then power consumption increases

Engineering Contradiction:
Improvegain accuracyVSAvoidamplifier power consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent replaces the need for a high-precision, high-power amplifier with a lower-precision, lower-power amplifier combined with a digital correction mechanism. The digital correction codes act as a low-power substitute for the precision that would otherwise require high power consumption in the analog amplifier.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent substitutes analog precision (mechanical/electrical precision in the amplifier) with digital correction. Instead of relying on the amplifier's inherent precision, the system uses digital processing and correction codes to achieve the required accuracy, thereby reducing the power burden on the analog amplifier.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10541700B2Gain and memory error estimation in a pipeline analog to digital converter
Publication Date: 2020.01.21 TEXAS INSTRUMENTS INC
  • US10541700B2 patent drawing
  • US10541700B2 patent drawing
  • US10541700B2 patent drawing

AI summary

In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal.