Storage Address Switching for Stable Low-Power Wake-Up

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Solution Overview

Problem

Existing electronic devices face instability and deadlock issues during power mode transitions due to noise interference in the detection of wake-up events, particularly when multiple storage devices trigger wake-up events simultaneously or within short time intervals, leading to inconsistent activation of function blocks.

Innovation Solution

A method and device design where the storage device changes its input address to indicate the intention to exit a low-power mode by providing negative acknowledge responses, allowing the host device to detect this intention through additional read requests, thereby avoiding direct electrical signal conflicts and enhancing stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the storage device uses direct electrical signal detection for wake-up events, then the response speed is fast, but noise interference causes instability and deadlock issues during power mode transitions

Engineering Contradiction:
Improvewake-up event response speedVSAvoidpower mode transition stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent introduces an intermediary mechanism where the storage device changes its address in the internal memory device to signal wake-up intention, rather than using direct electrical signals. The host device reads this address change as a wake-up indication, eliminating noise interference while maintaining response capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the electrical signal-based wake-up detection mechanism with an address-based communication mechanism. Instead of detecting electrical signal changes that are susceptible to noise, the system uses memory address reads/writes to convey wake-up intentions, thereby improving reliability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If multiple storage devices trigger wake-up events simultaneously, then the system responsiveness is improved, but noise interference causes inconsistent activation of function blocks

Engineering Contradiction:
Improvesystem responsivenessVSAvoidfunction block activation consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The address change mechanism serves as a reliable intermediary that multiple storage devices can use simultaneously without electrical signal conflicts. Each device can independently change its address to signal wake-up, and the host device reads these address changes consistently, ensuring reliable function block activation even under concurrent operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the storage device changes address to indicate wake-up intention, then noise-related errors are reduced, but additional read requests are required to detect the intention

Engineering Contradiction:
Improvewake-up detection accuracyVSAvoidwake-up detection time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The storage device performs preliminary action by changing its address before actually activating function blocks. This address change serves as an advance notification to the host device, allowing the host to prepare for wake-up in a timely manner without requiring complex real-time detection mechanisms.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260024593A1Storage device changing address, method of operating the same, and method of operating electronic device including the same
Publication Date: 2026.01.22 SAMSUNG ELECTRONICS CO LTD
  • US20260024593A1 patent drawing
  • US20260024593A1 patent drawing
  • US20260024593A1 patent drawing

AI summary

A method of operating a storage device includes receiving a second power supply voltage among a first power supply voltage and the second power supply voltage from a host device, driving a logic circuit and an internal memory device of the storage device, based on the second power supply voltage, changing an input address of the internal memory device from a first address to a second address, receiving a first read request corresponding to the first address from the host device, providing a negative acknowledge response to the host device based on the first read request, after providing the negative acknowledge response, receiving a second read request corresponding to the second address from the host device, providing a positive acknowledge response to the host device based on the second read request, and after providing the positive acknowledge response, receiving the first power supply voltage from the host device.