Storage Controller Request Coalescing for Sequential Page Access

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Solution Overview

Problem

Storage device controllers face inefficiencies due to unordered access requests, random page accesses, and power wastage from frequent page activations, leading to fragmented memory operations and resource utilization issues.

Innovation Solution

Implementing a coalescing engine that groups related transactions into batches, using timers and buffers to manage access requests based on permissible delays, and organizing them for sequential processing to reduce page churn and improve memory bandwidth efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the controller processes access requests sequentially based on arrival timing, then the controller can process requests in a simple order, but this causes random page accesses and frequent page activations leading to power wastage and fragmented memory operations

Engineering Contradiction:
Improverequest processing orderVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent segments access requests into different queues based on their timing characteristics. Requests are divided into those that should be processed immediately versus those that can wait, allowing the controller to organize processing in a way that reduces random page accesses and consolidates memory operations, thereby reducing power consumption while maintaining operational simplicity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by buffering access requests and delaying their processing until appropriate moments. This allows the controller to collect multiple requests before executing them, consolidating memory operations and reducing the frequency of page activations, which directly reduces power consumption while maintaining the simplicity of sequential processing

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the controller accesses pages based on timing of receipt of access requests, then the controller can process requests as they arrive, but this leads to fragmented memory operations and random page accesses

Engineering Contradiction:
Improverequest processing throughputVSAvoidmemory operation pattern
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the stream of access requests into organized queues that separate immediate-processing requests from delayable requests. This segmentation allows the controller to maintain high throughput by processing requests in an organized manner rather than reacting to each arrival individually, thereby reducing fragmented memory operations while preserving productivity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses preliminary action by buffering requests and delaying execution until optimal moments. This allows the controller to batch multiple requests together, creating coherent memory operation patterns rather than random scattered accesses, while still maintaining high processing throughput through efficient request consolidation

Inventive Principle:
Principle #10Preliminary action

3Speed

If the controller processes access requests immediately upon arrival, then the controller responds quickly to requests, but this causes frequent page activations and random access patterns

Engineering Contradiction:
Improveresponse speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The patent implements preliminary action by buffering access requests and delaying their processing until appropriate moments. This allows the controller to respond quickly to requests by acknowledging them immediately while buffering them, then consolidating and executing multiple requests together to reduce page activations and power consumption, effectively balancing response speed with energy efficiency

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250348449A1Coalescing of data at a storage device controller
Publication Date: 2025.11.13 MICROCHIP TECHNOLOGY INC
  • US20250348449A1 patent drawing
  • US20250348449A1 patent drawing
  • US20250348449A1 patent drawing

AI summary

In some implementations, a storage device may receive a set of access requests, the set of access request comprising a subset of the set of access requests that are associated with a data stream, the subset being associated with an amount of permissible delay for processing. The storage device may delay processing the subset of access requests based at least in part on the permissible delay and association with a data stream. The storage device may process the subset of access requests sequentially based at least in part on the delay.