Storage Device Latch Management for Leakage Current Reduction

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Solution Overview

Problem

Semiconductor memory devices face challenges in reducing leakage currents during sleep or reduced power modes, which increases standby current and affects energy efficiency.

Innovation Solution

The method involves storing initial latch data in nonvolatile memory devices and using it to set up latches when entering a reduced power mode, thereby minimizing leakage currents. This is achieved by reading and programming data from a power-up flag cell to determine the number of power-up operations and setting latches accordingly, and storing this data during manufacturing or power-up operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the storage device enters a reduced power mode, then power consumption is reduced, but leakage currents increase

Engineering Contradiction:
Improvepower consumptionVSAvoidleakage currents
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by storing initial latch data in nonvolatile memory before entering reduced power mode. When the device transitions to low-power state, this pre-stored data is read and used to set up latches, ensuring they are properly configured without requiring continuous power. This preliminary preparation eliminates the need for power-intensive latch maintenance during standby, thereby reducing power consumption while preventing leakage currents through proper latch initialization.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes by transitioning latch configuration parameters from volatile to nonvolatile storage. The initial latch data is programmed into nonvolatile memory cells during manufacturing or power-up, changing the state retention mechanism from power-dependent to power-independent. This parameter change allows latches to maintain their configured state without continuous power supply, reducing both power consumption and leakage currents during reduced power modes.

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If latches are set up with initial latch data, then leakage currents are reduced, but additional operations are required during power-up

Engineering Contradiction:
Improveleakage currentsVSAvoidpower-up operations
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing the latch data programming operation during the initial power-up sequence. The system reads power-up flag cell data to determine if this is the first power-up event, and if so, programs the initial latch data into nonvolatile memory. This preliminary setup ensures that subsequent power-up events can directly use the pre-programmed data, reducing leakage currents without requiring complex repeated operations. The additional operation is performed only once, establishing a simplified routine for future transitions.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9384803B2Storage device and latch management method thereof
Publication Date: 2016.07.05 SAMSUNG ELECTRONICS CO LTD
  • US9384803B2 patent drawing
  • US9384803B2 patent drawing
  • US9384803B2 patent drawing

AI summary

A latch management method of a storage device includes permitting the storage device to enter a reduced power mode in which the storage device operates with a reduced power. The method includes reading initial latch data stored in the at least one nonvolatile memory device in response to the entering operation. The method includes setting latches associated with the at least one nonvolatile memory device based on the read initial latch data.