Storage Node Contact Plug Etching Using Line Masks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor devices with feature sizes less than 80 nm, the formation of storage node contact plugs using ArF photoresist results in small open areas at the top of the plugs, leading to reduced overlay margins and increased maintenance costs due to expensive etching apparatus requirements, along with a higher likelihood of self-aligned contact failures and bit line hard mask damage.
Innovation Solution
The method involves forming line type storage node contact masks using KrF photoresist material, etching inter-layer insulation layers to create storage node contact holes with extended sidewalls, and filling these holes to increase the open area at the top of the storage node contact plugs, thereby reducing the occurrence of self-aligned contact failures and lowering manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If ArF photoresist is used for forming storage node contact holes, then etching precision is improved, but manufacturing cost increases and bit line hard mask damage occurs
Solution Approach 1:
The patent changes the photoresist material parameter from ArF to KrF, which has different etching characteristics. This substitution reduces manufacturing cost while maintaining sufficient etching precision for the contact hole formation process
Solution Approach 2:
The patent employs a disposable hard mask layer (amorphous carbon) that is intentionally designed to be consumed during the etching process. This cheap sacrificial layer protects the bit line structure while enabling the use of lower-cost KrF photoresist
2Manufacturing precision
If ArF photoresist is used for forming storage node contact holes, then etching precision is improved, but bit line hard mask damage increases
Solution Approach 1:
The patent introduces an amorphous carbon hard mask layer as an intermediary protective layer between the photoresist etching process and the bit line structure. This intermediate layer absorbs the harmful effects of the etching process, preventing damage to the underlying bit line hard mask
Solution Approach 2:
The amorphous carbon hard mask is designed as a sacrificial, disposable layer that is consumed during etching. It serves as a protective barrier that is intentionally removed or damaged to protect more critical structures underneath
3Productivity
If hole type contacts are formed with feature size less than 80 nm, then integration density is improved, but open area at contact plug top decreases
Solution Approach 1:
The patent transitions from forming symmetric hole-type contacts to asymmetric line-type contacts. This asymmetric configuration allows the contact structure to have a smaller footprint in critical dimensions while maintaining or increasing the effective open area at the top surface, thereby improving both integration density and contact area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the open area at the top of storage node contact plugs, increases the overlay margin, reduces the occurrence of self-aligned contact failures, and minimizes bit line hard mask damage, while using a cost-effective apparatus, thus improving the efficiency and cost-effectiveness of the semiconductor device fabrication process.
Implementation Method 1
etching portions of the inter-layer insulation layer using the line type storage node contact masks as an etch mask to form first contact holes with extended sidewalls
Data Source
AI summary
A method for forming a storage node contact plug in a semiconductor device is provided. The method includes: forming an inter-layer insulation layer over a substrate having a conductive plug; etching a portion of the inter-layer insulation layer using at least line type storage node contact masks as an etch mask to form a first contact hole with sloping sidewalls; etching another portion of the inter-layer insulation layer underneath the first contact hole to form a second contact hole exposing the conductive plug, the second contact hole having substantially vertical sidewalls; and filling the first and second storage node contact holes to form a storage node contact plug.