Semiconductor Storage Node Electrode Step Alignment

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Solution Overview

Problem

In semiconductor devices, particularly DRAM capacitors with double storage node electrodes, misalignment between top and bottom electrodes can lead to reliability issues and defective connections due to the top electrode extending into open regions or contacting multiple bottom electrodes, compromising the structural integrity and performance.

Innovation Solution

The semiconductor device design includes a substrate with a bottom sub-electrode, a top sub-electrode featuring a step adjacent to the bottom sub-electrode, and a dielectric layer covering both, along with a supporter pattern to prevent misalignment and ensure proper contact, utilizing an etch stop layer and mold structures to maintain electrode alignment and prevent profile defects during manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a top storage node electrode is disposed at an upper portion in a double storage node electrode structure, then the capacitance is increased by vertical stacking, but misalignment may occur causing the top electrode to extend into open regions or contact multiple bottom electrodes, compromising reliability

Engineering Contradiction:

ImprovecapacitanceVSAvoidelectrode connection reliability

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The storage node electrode is divided into multiple segments: a bottom sub-electrode and a top sub-electrode separated by a dielectric layer. This segmentation allows independent positioning and alignment control of each electrode portion, preventing misalignment issues while maintaining the vertical stacking configuration for increased capacitance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A dielectric layer is introduced as an intermediary between the bottom sub-electrode and the top sub-electrode. This dielectric layer provides electrical isolation and mechanical support, ensuring that the top electrode cannot extend into open regions or contact multiple bottom electrodes, thereby maintaining connection reliability.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Manufacturing precision

If the top storage node electrode is misaligned with the bottom storage node electrode, then manufacturing tolerance is exceeded, but the electrode may contact multiple bottom electrodes causing defective connections

Engineering Contradiction:

Improveelectrode alignment precisionVSAvoidconnection reliability

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The dielectric layer is positioned beforehand between the bottom sub-electrode and the top sub-electrode to provide a buffer zone. This pre-positioned dielectric structure prevents harmful effects of misalignment by maintaining proper spacing and electrical isolation, even when manufacturing tolerances are exceeded.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The dielectric layer provides localized electrical isolation and mechanical support at the critical interface between the bottom and top sub-electrodes. This local quality enhancement ensures proper alignment and prevents defective connections without requiring high precision throughout the entire electrode structure.

Inventive Principle:

Principle #3Local quality

3Quantity of substance

If a double storage node electrode structure is used to increase capacitance in a limited area, then the aspect ratio increases, but the structural complexity and alignment requirements increase

Engineering Contradiction:

Improvecapacitance densityVSAvoidelectrode structure complexity

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The storage node electrode is segmented into a bottom sub-electrode and a top sub-electrode separated by a dielectric layer. This segmentation enables the vertical stacking configuration that increases capacitance density in a limited area while managing structural complexity through modular design.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The electrode structure transitions from a planar configuration to a vertical three-dimensional stacking arrangement. By utilizing the vertical dimension, the capacitance density is increased without proportionally increasing the footprint area, though the structural complexity increases accordingly.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11610891B2Semiconductor device including storage node electrode including step and method of manufacturing the semiconductor device

Publication Date: 2023.03.21 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor device may include a bottom sub-electrode on a substrate, a top sub-electrode on the bottom sub-electrode, a dielectric layer covering the bottom and top sub-electrodes, and a plate electrode on the dielectric layer. The top sub-electrode may include a step extending from a side surface thereof, which is adjacent to the bottom sub-electrode, to an inner portion of the top sub-electrode. The top sub-electrode may include a lower portion at a level that is lower than the step and an upper portion at a level which is higher than the step. A maximum width of the lower portion may be narrower than a minimum width of the upper portion. The maximum width of the lower portion may be narrower than a width of a top end of the bottom sub-electrode. The bottom sub-electrode may include a recess in a region adjacent to the top sub-electrode.