Storage Verification Timeout Control by Logical Device Data Volume

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Solution Overview

Problem

Verification processes in storage systems can stall due to failures, leading to unnecessary downtime and increased failure frequency, without appropriate management and control of timeout periods.

Innovation Solution

An apparatus is provided that includes a processor and storage device to determine the amount of data in a target logical device, set a timeout period based on this data, and control the verification process accordingly, managing and controlling the verification process to reduce unnecessary downtime and failure frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed timeout period is used for verification process, then the control is simple, but the verification process may stall unnecessarily or complete too quickly without proper monitoring

Engineering Contradiction:

Improveverification process reliabilityVSAvoidverification downtime

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The timeout period is changed from a fixed value to a dynamic value that adapts based on the amount of data in the target logical device. The processor determines the data amount and sets the timeout period accordingly, allowing the verification process to have appropriate time limits tailored to each specific device and data size, thus improving reliability without causing unnecessary stalls or completing too quickly

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The timeout period parameter is adjusted based on the data amount parameter. By changing the timeout period according to the actual data size in the target logical device, the system optimizes the verification process timing to match the workload, preventing both premature timeouts and excessive waiting periods

Inventive Principle:

Principle #35Parameter changes

2Reliability

If verification process continues without timeout control, then completeness is improved, but failure frequency increases due to stalled processes

Engineering Contradiction:

Improveverification completionVSAvoidverification efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The timeout period dynamically adapts to the data amount, ensuring that verification processes have sufficient time to complete based on their actual workload while preventing indefinite stalling. This dynamic adjustment maintains verification completeness while improving overall efficiency by preventing prolonged failures

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system monitors the verification process and compares elapsed time against the determined timeout period. When the timeout is exceeded, the system intervenes to prevent continued stalling. This feedback mechanism ensures verification completeness while maintaining productivity by stopping failed processes promptly

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS20260023650A1Apparatus for managing verification process in storage system

Publication Date: 2026.01.22 HITACHI VANTARA LTD

AI summary

An apparatus for managing a verification process in a storage system includes a processor and a storage device. The processor determines an amount of data stored in a target logical device of a verification process, determines a timeout period of the target logical device based on the amount of data, and controls the verification process of the target logical device based on the determined timeout period.