Strained Channel Capping Layer Oxygen Diffusion Barrier

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Solution Overview

Problem

Semiconductor devices with strained channel layers face challenges in maintaining high electron or hole mobility due to oxidation issues, which can lead to reduced device performance and reliability.

Innovation Solution

Incorporating a capping layer made of materials like SiN or SiCN between the sidewall spacers and the channel layer to prevent oxygen diffusion, thereby protecting the channel layer and maintaining strain-induced mobility enhancements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a strained channel layer is used to increase carrier mobility, then device performance is improved, but the channel layer becomes susceptible to oxidation which reduces reliability

Engineering Contradiction:
Improvedevice reliabilityVSAvoidoxidation of channel layer
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A capping layer is introduced as an intermediary component between the sidewall spacer and the strained channel layer. This capping layer serves as a protective barrier that prevents oxygen from reaching and oxidizing the channel layer, while allowing the strain-induced mobility enhancement to be maintained. The capping layer is specifically positioned to contact the lower surface of the sidewall spacer and protect the channel layer during subsequent processing steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The capping layer creates an inert protective environment around the strained channel layer by providing a physical barrier that excludes oxygen. This inert atmosphere approach prevents oxidation without requiring changes to the channel layer composition or strain characteristics, thereby maintaining device performance while improving reliability.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

2Speed

If the channel layer is exposed to maintain strain configuration, then mobility enhancement is achieved, but oxidation occurs reducing device performance

Engineering Contradiction:
Improvecarrier mobilityVSAvoiddevice performance stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The capping layer is formed preliminarily before any oxidation-prone processing steps are performed on the strained channel layer. By establishing this protective barrier in advance, the channel layer is protected from oxidation while maintaining its strain configuration and high mobility characteristics. This preliminary protective action ensures that mobility enhancement is preserved without subsequent degradation.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The capping layer effectively prevents oxidation of the channel layer, maintaining compressive or tensile strain and enhancing hole or electron mobility, thus improving the overall performance and reliability of semiconductor devices.

Implementation Method 1

The plurality of capping layers may include a material preventing oxygen from being diffused into the channel layer

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

efforts have been made to develop semiconductor devices having a strained channel layer to increase the mobility of electrons or electron holes thereof

Methodology Applied
Scientific EffectStrain-induced mobility enhancement:

Data Source

PatentUS9576955B2Semiconductor device having strained channel layer and method of manufacturing the same
Publication Date: 2017.02.21 SAMSUNG ELECTRONICS CO LTD
  • US9576955B2 patent drawing
  • US9576955B2 patent drawing
  • US9576955B2 patent drawing

AI summary

Semiconductor devices are provided. The semiconductor devices include active fins including a buffer layer disposed on a substrate and a channel layer disposed on the buffer layer and having a first second lattice constant higher than a lattice constant of the buffer layer, a gate structure covering the channel layer and intersecting the active fins, sidewall spacers disposed on both sidewalls of the gate structure, and capping layers disposed to contact lower surfaces of the sidewall spacers and having a width substantially the same as a width of the lower surfaces of the sidewall spacers.