Strained Quantum Barrier Layer for FinFET Carrier Confinement
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Solution Overview
Problem
Existing semiconductor technologies face challenges in enhancing carrier mobility and band offset without inducing defect formation and relaxation, particularly in FinFET devices, where increased strain leads to defects and deteriorated short-channel effects.
Innovation Solution
The introduction of a strained quantum barrier layer between a strain-relaxed buffer layer and a channel layer decouples channel stress and band offset, allowing separate optimization of both parameters, thereby increasing band offset without excessive strain, using compositions like SiGe for the quantum barrier layer to create electron- or hole-confining quantum wells in FinFET and planar FET devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If strain is increased to enhance carrier mobility, then carrier mobility is improved, but defect formation and relaxation occur
Solution Approach 1:
The structure is segmented into three distinct layers: strain-relaxed buffer layer, strained quantum barrier layer, and channel layer. This segmentation allows the strain function to be localized to the quantum barrier layer while the buffer layer remains relaxed, preventing defect formation in the channel region.
Solution Approach 2:
The strain-relaxed buffer layer acts as an intermediary between the substrate and the channel layer, absorbing the strain that would otherwise be transmitted to the channel. This mediator layer prevents defect formation while still allowing the quantum barrier to provide the necessary strain for carrier mobility enhancement.
2Reliability
If band offset is increased to improve carrier confinement, then carrier confinement is enhanced, but excessive strain is induced
Solution Approach 1:
Different regions of the structure have different strain states tailored to their specific functions: the buffer layer is strain-relaxed for structural stability, the quantum barrier layer is strained for carrier confinement, and the channel layer maintains appropriate strain for carrier mobility. This local optimization resolves the contradiction between confinement and excessive strain.
Solution Approach 2:
The patent changes the composition parameter (SiGe ratio) of the quantum barrier layer to precisely control both the band offset and strain levels. By adjusting the Ge content in SiGe, the invention achieves optimal carrier confinement while maintaining strain below the relaxation threshold.
3Speed
If channel stress is optimized for mobility, then carrier mobility is enhanced, but band offset is compromised
Solution Approach 1:
The invention segments the stress/band offset function from the mobility function by placing a strained quantum barrier layer between the relaxed buffer and the channel. This allows independent optimization: the quantum barrier provides band offset through strain, while the channel maintains stress optimized for mobility.
Solution Approach 2:
The quantum barrier layer serves as an intermediary that provides the necessary band offset through its strained structure, while transmitting appropriate stress conditions to the channel layer for mobility optimization. This mediator decouples the two conflicting requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves drain-induced barrier lowering and subthreshold slope significantly for 10 nm-node FinFETs with reduced junction leakage and defect formation, enhancing carrier confinement and mobility while maintaining device reliability.
Implementation Method 1
The compositions of the strain-relaxed buffer layer, the strained quantum barrier layer and the channel layer are chosen such that a band offset of the channel layer and a band offset of the strained quantum barrier layer have opposite signs with respect to the strain-relaxed buffer layer. The resulting conduction band structure of the FinFET device comprises an electron-confining quantum well and the resulting valence band structure of the FinFET device comprises a hole-confining quantum well
Implementation Method 2
Another approach includes inducing stress in the channel to enhance carrier mobility
Data Source
AI summary
The disclosed technology relates to transistors having a strained quantum well for carrier confinement, and a method for manufacturing thereof. In one aspect, a FinFET or a planar FET device comprises a semiconductor substrate, a strain-relaxed buffer layer comprising Ge formed on the semiconductor substrate, a channel layer formed on the strain-relaxed buffer layer, and a strained quantum barrier layer comprising SiGe interposed between and in contact with the strain-relaxed buffer layer and the channel layer. The compositions of the strain-relaxed buffer layer, the strained quantum barrier layer and the channel layer are chosen such that a band offset of the channel layer and a band offset of the strained quantum barrier layer have opposite signs with respect to the strain-relaxed buffer layer.