Strained Semiconductor Channel Fabrication via Selective Etching

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Solution Overview

Problem

The fabrication of strained semiconductor structures for transistor channel regions often involves etching steps that lead to relaxation phenomena and loss of stress, which complicates the formation of a stable strained channel structure.

Innovation Solution

A method involving the selective etching of alternating semiconducting bars to expose regions for coating with a strained semiconducting material, forming a sheath around the bars with a different mesh parameter, which maintains strain without intermediate heat treatment to prevent dopant diffusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If etching steps are used to form the channel structure, then the channel structure can be fabricated, but relaxation phenomenon and loss of stress occur

Engineering Contradiction:

Improvechannel structure fabricationVSAvoidstress stability

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by forming the strained semiconductor layer before the etching step. The strain is introduced in the semiconductor layer while it is still intact and protected, and then the surrounding material is removed to form the channel structure. This ensures the strain is already present and stable before any potentially damaging etching operations occur.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses an intermediary approach by introducing a strained semiconductor layer as a mediating element between the substrate and the final channel structure. This layer serves as both the strain source and the functional channel, allowing the strain to be maintained while enabling the desired device structure through selective etching of sacrificial layers.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of manufacture

If intermediate heat treatment is applied, then processing can be completed, but dopant diffusion occurs

Engineering Contradiction:

Improveprocessing completionVSAvoiddopant position control

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by carefully controlling the temperature and time parameters of the processing steps. By using lower temperatures and shorter durations where possible, and by timing heat treatment steps to occur only when necessary and only for brief periods, the patent minimizes dopant diffusion while still achieving the required processing objectives such as layer formation and crystallization.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively forms a strained semiconductor structure suitable for both PMOS and NMOS transistors by maintaining the strain effect and preventing unwanted dopant diffusion, enhancing the stability and performance of the transistor channel.

Implementation Method 1

form a strained region in the opening by coating the second bars with a given semiconducting material that is strained because its mesh parameter is not the same as the mesh parameter of the second material

Methodology Applied

Scientific EffectLattice mismatch strain: Deformation

Implementation Method 2

remove exposed portions of the structure based on the first material through an opening in a mask formed on the structure, the removal being made by selective etching in the opening of the first material relative to the second material

Methodology Applied

Scientific EffectSelective etching:

Data Source

PatentUS10141424B2Method of producing a channel structure formed from a plurality of strained semiconductor bars

Publication Date: 2018.11.27 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

Method of manufacturing a structure with semiconducting bars suitable for forming one at least one transistor channel, including the following steps:a) make a semiconducting structure, composed of an alternation of first bars based on a first material and second bars based on a second material, the second material being a semiconducting material, thenb) remove exposed portions of the structure based on the first material through an opening in a mask formed on the structure, the removal being made by selective etching in the opening of the first material relative to the second material, so as to expose a space around the second bars, thenc) grow a given semiconducting material (25) around the second bars (6c) in the opening, the given semiconducting material having a mesh parameter different from the mesh parameter of the second material (7) so as to induce a strain on the sheaths based on the given semiconducting material.