Strained Source Drain Structures for Carrier Mobility

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Solution Overview

Problem

As semiconductor devices are miniaturized, the challenges in processing and manufacturing increase, particularly in achieving higher levels of integration and improving carrier mobility, which existing technologies struggle to address effectively.

Innovation Solution

The formation of strained source and drain structures with specific trapezoidal and inverted trapezoidal shapes, made of different semiconductor materials like SiGe and SiC, is used to induce compressive and tensile stresses, respectively, enhancing carrier mobility by precisely controlling the shapes of these structures through etching processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor devices are miniaturized to achieve higher levels of integration, then device density and integration level are improved, but processing and manufacturing difficulty increases

Engineering Contradiction:
Improveintegration levelVSAvoidprocessing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies different etching rates to different regions of the source and drain structures by using selective masking and etching processes. The channel region receives a different etching treatment compared to the source and drain regions, creating local quality variations that induce stress in specific areas to enhance carrier mobility without affecting the entire device structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the physical and chemical parameters of the source and drain structures by forming them with different materials (e.g., SiGe for compressive stress, SiC for tensile stress) and controlling their crystalline orientation. These parameter changes enable stress induction to improve carrier mobility while maintaining device miniaturization.

Inventive Principle:
Principle #35Parameter changes

2Area of stationary object

If device size is reduced to improve integration, then area occupied by devices is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedevice areaVSAvoidetching precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent segments the etching process into multiple stages with different masking layers and etching conditions. By dividing the single etching step into sequential steps with intermediate masking and patterning, the process achieves the required precision for miniaturized devices while maintaining control over the final source and drain structure geometry.

Inventive Principle:
Principle #1Segmentation

3Reliability

If carrier mobility is improved through stress induction, then electrical performance is enhanced, but device structure complexity increases

Engineering Contradiction:
Improvecarrier mobilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the stress induction function with the source and drain structure formation process. By forming the source and drain structures with specific materials and orientations during the standard device fabrication process, the stress-induced carrier mobility enhancement is achieved without requiring separate stress application steps or additional complex structure elements.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves carrier mobility and electrical performance by concentrating stress on the channel regions under the gates, leading to better device performance and uniformity compared to isotropic etching methods.

Implementation Method 1

first strained source and drain structures are formed in the first recesses... second strained source and drain structures are formed in the second recesses... concentrating stress on the channel regions under the gates

Methodology Applied
Scientific EffectStress-induced carrier mobility enhancement: Piezoresistive Effect

Data Source

PatentUS9559165B2Semiconductor structure with strained source and drain structures and method for forming the same
Publication Date: 2017.01.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9559165B2 patent drawing
  • US9559165B2 patent drawing
  • US9559165B2 patent drawing

AI summary

A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a first gate structure and a second gate structure formed over the substrate. The semiconductor structure further includes first recesses formed in the substrate adjacent to the first gate structure and first strained source and drain structures formed in the first recesses. The semiconductor structure further includes second recesses formed in the substrate adjacent to the second gate structure and second strained source and drain structures formed in the second recesses. In addition, each of the first recesses has a shape of a trapezoid, and each of the second recesses has a shape of an inverted trapezoid.