Strained Vertical FinFETs via Oxidation-Induced Volume Expansion

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Solution Overview

Problem

Conventional processing methods fail to maintain vertical strain in fin pillars of vertical fin field-effect transistors (FinFETs), which is essential for enhancing drive current, as vertical strain becomes relaxed during conventional processing.

Innovation Solution

A method involving the oxidation of SiGe layers to form a silicon oxide layer, resulting in volume expansion and introduction of vertical stress, which preserves strain in the fin pillars by forming a gate and source/drain structure around them.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional processing methods are used to form vertical FinFET structures, then the device architecture can be established, but vertical strain in fin pillars becomes relaxed and is not maintained

Engineering Contradiction:
Improvevertical strain maintenanceVSAvoidstrain preservation in fins
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the physical and chemical state of the sacrificial layer by oxidizing silicon to silicon oxide. This parameter change results in volume expansion (approximately 2.2x increase), which generates compressive stress in the overlying fin structures, thereby maintaining vertical strain during subsequent processing steps

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The oxidation process represents a phase transition from silicon to silicon oxide. This phase transition is accompanied by significant volume expansion, which creates the mechanical stress necessary to maintain vertical strain in the fin pillars throughout device fabrication

Inventive Principle:
Principle #36Phase transitions

2Length of moving object

If horizontal FinFET architecture is used, then current flows between source/drain regions at opposite ends of fins, but the device is limited by scaling plateaus and cannot extend beyond conventional dimensions

Engineering Contradiction:
Improvecontacted poly pitchVSAvoiddevice scaling capability
Core Design Contradiction:
Length of moving objectVSProductivity

Solution Approach 1:

The patent transitions from horizontal current flow to vertical current flow through the fin pillars. This dimensional change allows the device to overcome horizontal scaling limitations by utilizing the vertical dimension for current transport, enabling continued scaling beyond conventional contacted poly pitch plateaus

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Power

If vertical FinFET architecture is implemented with oxidation-induced strain, then drive current is enhanced through maintained vertical strain, but the process requires additional oxidation steps and volume expansion control

Engineering Contradiction:
Improvedrive currentVSAvoidoxidation process control
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent introduces a sacrificial silicon layer as an intermediary element that is subsequently oxidized. This intermediary approach allows strain to be introduced indirectly through the oxidation of the sacrificial layer rather than direct strain engineering methods, providing better process control and integration with existing CMOS fabrication

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively maintains and introduces vertical strain in the channels of FinFETs, enhancing drive current and overcoming the limitations of conventional horizontal transistor architectures.

Implementation Method 1

oxidizing the first semiconductor layer to form an oxide layer in place of the first semiconductor layer

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

a volume of the oxide layer is larger than a volume of the first semiconductor layer prior to the oxidation

Methodology Applied
Scientific EffectVolume expansion: Thermal Expansion

Implementation Method 3

producing a strain in each of the plurality of fins due to the larger volume of the oxide layer

Methodology Applied
Scientific EffectStress:

Data Source

PatentUS9614087B1Strained vertical field-effect transistor (FET) and method of forming the same
Publication Date: 2017.04.04 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US9614087B1 patent drawing
  • US9614087B1 patent drawing
  • US9614087B1 patent drawing

AI summary

A method for manufacturing a semiconductor device includes forming a first semiconductor layer on a substrate, forming a bottom source/drain region on the first semiconductor layer, forming a second semiconductor layer on the bottom source/drain region, patterning the second semiconductor layer into a plurality of fins extending from the bottom source/drain region vertically with respect to the substrate, forming a gate structure around the plurality of fins, forming a top source/drain region on each of the plurality of fins, oxidizing the first semiconductor layer to form an oxide layer in place of the first semiconductor layer, wherein a volume of the oxide layer is larger than a volume of the first semiconductor layer prior to the oxidation, and producing a strain in each of the plurality of fins due to the larger volume of the oxide layer.