Stream Processor Command Data Transfer Overhead
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Solution Overview
Problem
Array type processors experience reduced processing efficiency due to the time required to analyze commands and transition states, leading to delays in data processing and interruptions in operations when accessing memory for large data storage.
Innovation Solution
Incorporating an input DMA circuit that transfers commands to the state management unit before data, allowing the data path unit to switch states and process data without analyzing commands, and using a memory access control circuit to manage data transfers efficiently, thereby reducing overhead and improving processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the array type processor analyzes commands and transitions states before processing data, then the processing configuration is properly set up, but the data processing efficiency is reduced due to the time required for command analysis and state transition
Solution Approach 1:
The input DMA circuit performs preliminary action by transferring commands to the state management unit before the data is transferred to the data path unit. This allows the array type processor to analyze commands and complete state transitions in advance, so that when data arrives, the processor is already ready to execute operations immediately, thereby resolving the contradiction between proper configuration setup and data processing efficiency
Solution Approach 2:
The system is segmented into functional units: the input DMA circuit handles command transfer separately from data transfer, and the state management unit processes commands independently before the data path unit executes operations. This segmentation allows command analysis and state transition to occur in parallel with data preparation, reducing the overall time delay and improving processing efficiency while maintaining configuration correctness
2Reliability
If the array type processor waits for memory access to complete before continuing processing, then data is correctly retrieved, but processing efficiency is reduced due to interruptions and delays
Solution Approach 1:
The input DMA circuit enables continuity of useful action by overlapping command transfer and data transfer operations. While the array type processor is accessing memory for data, the input DMA circuit can already be preparing the next command and transferring it to the state management unit. This eliminates idle waiting time and maintains continuous productive operation, resolving the contradiction between reliable data retrieval and processing efficiency
Solution Approach 2:
The input DMA circuit acts as an intermediary between the memory and the array type processor. It buffers commands and coordinates the timing of data transfer, allowing the processor to issue memory access requests without blocking the overall processing flow. This intermediary mechanism ensures correct data retrieval while minimizing interruptions to the processing sequence
Data Source
AI summary
An array type processor comprises a data path unit to execute processing, and a state management unit to control the state of the data path unit in accordance with a command that specifies processing on the data. An input DMA circuit reads from a memory information and data to be processed including a command corresponding to the data. The input DMA circuit first transfers the command to the state management unit, and then transfers the data to be processed to the data path unit.