Streaming Modular Multiplication with Partial Reduction Pipelines

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Solution Overview

Problem

Large modular arithmetic operations in cryptographic schemes like RSA and AES are computationally expensive due to the size of multiplicands, creating a bottleneck for real-time processing.

Innovation Solution

A method for large modular multiplication using streaming interfaces, involving a counter, multiplier, left shifter, accumulator, and modular reduction modules, which process bits in-line as they arrive from the interface, reducing the multiplier bit-width and the number of reduction steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If large modular multiplication is performed using conventional methods, then cryptographic security is maintained, but computational expense increases and real-time processing becomes difficult

Engineering Contradiction:
Improvecryptographic securityVSAvoidreal-time processing capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the large modular multiplication operation into smaller manageable components: breaking the multiplicand into multiple words (32-bit or 64-bit chunks), performing partial modular reductions at each step, and using a pipeline architecture where multiple operations occur simultaneously. This segmentation reduces the computational burden per cycle while maintaining the overall cryptographic security of the large-number multiplication.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements continuous processing by maintaining a pipeline where words are received, multiplied, shifted, and reduced continuously as they arrive from the streaming interface. The accumulator continuously accumulates partial results, and the modular reducer continuously performs partial reductions. This continuous operation eliminates idle cycles and maximizes throughput for real-time cryptographic processing.

Inventive Principle:
Principle #20Continuity of useful action

2Speed

If the multiplier bit-width is reduced for streaming processing, then processing speed increases, but the precision of large-number multiplication may be compromised

Engineering Contradiction:
Improveprocessing speedVSAvoidmultiplication precision
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent segments the large multiplier into multiple smaller words (32-bit or 64-bit chunks) that can be processed in parallel through the streaming interface. Each word is multiplied separately and then combined through accumulation and modular reduction. This segmentation allows the use of narrower, faster hardware units while maintaining the precision required for large-number multiplication through the cumulative effect of multiple operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate representation structures including the accumulator register and partial reduction results as intermediaries between the streaming interface and the final result. These intermediaries temporarily hold partial products and accumulated values, allowing the system to process data in smaller precision steps while maintaining overall precision through the accumulation mechanism and final modular reduction.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If the number of modular reduction steps is reduced for faster processing, then computation time decreases, but the accuracy of the final result may be affected

Engineering Contradiction:
Improvecomputation timeVSAvoidresult accuracy
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The patent performs preliminary partial modular reductions at each step of the streaming processing, reducing the accumulated result modulo the modulus after each word is processed. This preliminary action keeps the intermediate values manageable in size and prevents them from growing excessively large, which would require more reduction steps later. By performing reductions continuously and preliminarily, the system achieves both speed and accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent maintains continuous modular reduction throughout the streaming processing operation, performing partial reductions after each word is processed and accumulating the results continuously. This continuous reduction ensures that the final result is accurate while minimizing the total computation time, as reductions are performed overlap with the multiplication and accumulation operations rather than sequentially after completion.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20260023527A1Systems and methods for large modular multiplication using streaming interfaces
Publication Date: 2026.01.22 JPMORGAN CHASE BANK NA
  • US20260023527A1 patent drawing
  • US20260023527A1 patent drawing
  • US20260023527A1 patent drawing

AI summary

A method may include: receiving, from a streaming interface, a plurality of words for a first factor in a modular multiplication problem; as each word is received: counting, by a counting module, a number of the plurality of words received; multiplying, by a multiplier module, the word by a second; shifting left, by a left shifter module, an output of the multiplier module; accumulating, by an accumulator module, an output of the left shifter module with a partially reduced output for a prior word; receiving, by the modular reducer module, a modulus and performing partial modular reduction on an output of the accumulator module; providing, by the modular reducer module, an output of the modular reducer module to the accumulator module; and repeating until all words are received from the streaming interface; performing, by the modular reducer module, final modular reduction.