Stress Compensating Polymer Layer for Heterogeneous Wafer Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Wafer level integration of heterogeneous wafers is challenging due to differences in structure, materials, coefficients of thermal expansion, processing, equipment, mechanical stresses, and thermal considerations, leading to non-planarity and breakage issues that affect manufacturing yields.
Innovation Solution
Applying a stress compensating polymer or oxide layer to heterogeneous wafers and low-temperature bonding them to minimize stress and warpage, using techniques such as precision alignment, chemical-mechanical polishing, and controlled annealing to form a multi-layer wafer pair with reduced stress and enhanced bonding strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If heterogeneous wafers with different materials and structures are integrated at wafer level, then product functionality and performance are improved, but mechanical stresses and warpage increase due to different coefficients of thermal expansion
Solution Approach 1:
The patent introduces an intermediary layer between heterogeneous wafers to mediate the mechanical stress caused by different coefficients of thermal expansion. This intermediate layer acts as a buffer that accommodates the stress differential while maintaining the integrity of the bonded wafer structure, enabling heterogeneous integration without excessive warpage or breakage.
Solution Approach 2:
The patent modifies process parameters including bonding temperature, pressure, and atmosphere to optimize the bonding process for heterogeneous wafers. By carefully controlling these parameters, the patent achieves strong bonding while minimizing thermal stress and warpage, resolving the contradiction between achieving heterogeneous integration and maintaining structural integrity.
2Device complexity
If heterogeneous wafers are bonded together, then integrated structure is achieved, but manufacturing yield decreases due to non-planarity and breakage
Solution Approach 1:
The patent performs preliminary actions before bonding including surface preparation, cleaning, and stress characterization of the heterogeneous wafers. By preparing the wafer surfaces in advance and characterizing their stress states, the patent ensures optimal bonding conditions that reduce non-planarity and breakage, thereby improving manufacturing yield while achieving the integrated structure.
Solution Approach 2:
The patent replaces traditional high-temperature mechanical bonding processes with low-temperature bonding methods that use chemical or physical mechanisms instead of relying solely on mechanical pressure and heat. This substitution reduces the risk of thermal damage and mechanical breakage, improving yield while maintaining the integrity of the heterogeneous integrated structure.
3Strength
If conventional bonding processes are used for heterogeneous wafers, then bonding strength is achieved, but thermal management becomes difficult due to different thermal properties
Solution Approach 1:
The patent applies local quality by using different bonding approaches for different regions or types of wafer interfaces. Instead of using a uniform bonding process for all heterogeneous interfaces, the patent tailors the bonding conditions and materials to the specific thermal and mechanical properties of each wafer pair, achieving both strong bonding and effective thermal management.
Solution Approach 2:
The patent employs composite material structures that combine materials with different thermal conductivities and expansion coefficients in a layered configuration. These composite structures are designed to provide both mechanical bonding strength and thermal management capabilities, allowing heat to be effectively conducted away from sensitive regions while maintaining strong inter-wafer bonds.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces mechanical and thermal stresses between wafers, minimizing warpage and defects, and results in a more robust multi-layer wafer structure with improved manufacturing yields and product reliability.
Implementation Method 1
applying at least one stress compensating polymer layer to at least one of two heterogeneous wafers
Implementation Method 2
low temperature bonding the two heterogeneous wafers to bond the stress compensating polymer layer to the other of the two heterogeneous wafers
Data Source
AI summary
A method of manufacturing a multi-layer wafer is provided. At least one stress compensating polymer layer is applied to at least one of two heterogeneous wafers. The stress compensating polymer layer is low temperature bonded to the other of the two heterogeneous wafers to form a multi-layer wafer pair. Channels are created between die on at least one of the two heterogeneous wafers. The channels are back filled with one of oxide or polymer to create a channel oxide deposition.