Adaptive Strobe Delay Calibration for Phase-Aligned Data Sampling

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Solution Overview

Problem

High-speed signaling systems face issues with phase errors between data and strobe signals due to propagation-time differences and operational variations, leading to reduced signaling margin and increased bit errors.

Innovation Solution

An adaptive timing calibration system that uses a variable delay circuit to adjust the strobe signal, oversampling the data signal to detect phase errors and iteratively correct the propagation delay to maintain optimal sampling alignment, addressing both static and dynamic phase errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If static timing calibration is used to align data and strobe signals, then initial phase alignment is achieved, but dynamic phase errors due to voltage and temperature variations cannot be compensated

Engineering Contradiction:
Improvephase alignment precisionVSAvoidadaptability to voltage and temperature changes
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic timing calibration by continuously monitoring phase errors and adjusting the strobe signal delay in real-time based on detected deviations, allowing the system to adapt to changing operating conditions rather than relying on fixed initial calibration

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs feedback mechanisms where phase error detection circuits continuously measure the alignment between data and strobe signals, and this error information is fed back to adjust the variable delay circuit, creating a closed-loop control system that maintains optimal phase alignment under varying conditions

Inventive Principle:
Principle #23Feedback

2Reliability

If propagation delay is increased to accommodate signal variations, then timing margin is improved, but signaling speed and productivity deteriorate

Engineering Contradiction:
Improvesignaling reliabilityVSAvoiddata transfer speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically adjusts the strobe signal delay based on actual phase error measurements rather than using a fixed conservative delay, allowing the delay to be minimized when conditions permit while maintaining reliability, thus optimizing the trade-off between speed and reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the delay parameter adaptively based on operating conditions and measured phase errors, rather than maintaining a fixed delay value, allowing the system to achieve reliable operation at higher speeds by reducing unnecessary delay margins

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If oversampling is used to detect phase errors, then measurement precision is improved, but device complexity and energy consumption increase

Engineering Contradiction:
Improvephase error detection precisionVSAvoidcomplexity of timing calibration circuitry
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The oversampling process is segmented into discrete sampling points relative to the strobe signal edges, with phase error detection performed at specific intervals, reducing the continuous complexity while maintaining sufficient measurement precision for effective calibration

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8121237B2Signaling system with adaptive timing calibration
Publication Date: 2012.02.21 RAMBUS INC
  • US8121237B2 patent drawing
  • US8121237B2 patent drawing
  • US8121237B2 patent drawing

AI summary

An integrated circuit device includes a delay circuit, sampling circuit and delay control circuit that cooperate to carry out adaptive timing calibration. The delay circuit generates a timing signal by delaying an aperiodic input signal for a first interval. The sampling circuit samples a data signal in response to the timing signal to generate a sequence of data samples, and also samples the data signal in response to a phase-shifted version of the timing signal to generate a sequence of edge samples. The delay control circuit adjusts the first interval based, at least in part, on a phase error indicated by the sequence of data samples and the sequence of edge samples.