Strobe Signal Circuit for DDR-to-SDR Timing Conversion

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Solution Overview

Problem

Semiconductor apparatuses face challenges in internally processing and generating stable strobe signals when operating in Single Data Rate (SDR) mode due to increasing clock signal frequencies, requiring effective conversion from external Double Data Rate (DDR) strobe signals.

Innovation Solution

A strobe signal generation circuit that includes a counter to generate source signals, a delay to create delayed signals, and a combination unit to selectively combine these signals to produce internal even and odd strobe signals, ensuring stable operation by processing external DDR strobe signals and generating internal SDR signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the operating speed of the semiconductor memory increases, then the frequency of the clock signal increases, but the semiconductor apparatus cannot internally operate in DDR manner and must process strobe signals differently

Engineering Contradiction:
Improveoperating speedVSAvoidoperating mode compatibility
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The external strobe signal is divided into even and odd source signals through a counter circuit. This segmentation allows the system to process high-speed DDR external signals by breaking them down into manageable SDR-compatible internal components, resolving the contradiction between high operating speed and internal processing capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A strobe signal generation circuit acts as an intermediary between the external DDR strobe signal and the internal SDR processing architecture. The circuit includes a counter that generates even/odd source signals, delay elements that create timing adjustments, and a combination unit that synthesizes the final internal strobe signal, enabling seamless operation across different data rates.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the semiconductor apparatus processes external DDR strobe signals internally in SDR manner, then internal operation stability improves, but additional signal processing circuits are required

Engineering Contradiction:
Improveinternal operation stabilityVSAvoidsignal processing circuit
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The strobe signal generation circuit is designed to be universal, handling both even and odd phase signals through the same counter and combination unit architecture. This multi-functional design processes DDR external signals while generating SDR-compatible internal signals using a unified circuit structure, improving reliability without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The counter circuit performs preliminary action by pre-generating even and odd source signals from the external strobe signal before these signals enter the main processing pipeline. This advance signal preparation ensures stable internal operation by establishing properly timed source signals upfront, reducing the processing burden on subsequent circuit stages.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If the semiconductor apparatus generates internal strobe signals by counting external strobe signals, then timing precision improves, but signal delay and combination circuits are needed

Engineering Contradiction:
Improvetiming precisionVSAvoiddelay and combination circuit
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The counter circuit utilizes periodic action by counting alternating even and odd edges of the external strobe signal in a systematic sequence. This periodic counting mechanism precisely generates corresponding even and odd source signals with accurate timing relationships, achieving high measurement precision while using a relatively simple repetitive circuit structure.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The delay elements provide dynamic timing adjustment by introducing configurable time delays to the source signals. This dynamic delay capability allows precise timing alignment of the even and odd signals before combination, achieving high timing precision while keeping the delay circuitry flexible and adaptable to different operating conditions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9571081B2Strobe signal generation circuit and semiconductor apparatus using the same
Publication Date: 2017.02.14 SK HYNIX INC
  • US9571081B2 patent drawing
  • US9571081B2 patent drawing
  • US9571081B2 patent drawing

AI summary

A strobe signal generation circuit may include: a counter to generate a first source signal and a second source signal by counting an external strobe signal; a delay to generate a first delayed signal and a second delayed signal by delaying the first source signal and the second source signal by a preset time; and a combination unit to generate internal strobe signals by selectively combining the first source signal, the second source signal, the first delayed signal, and the second delayed signal.