STT-MRAM Readout Circuit with Pre-Charge Capacitors

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Solution Overview

Problem

The resistance ratio of magnetic tunnel junctions (MTJs) in spin transfer torque magnetic random-access memory (STT-MRAM) is limited, leading to a small readout window, which can be enlarged by increasing the read current, but this affects reliability and introduces read crosstalk, while a small current prolongs read time, and unselected memory cells on the bit line cause leakage affecting the reference voltage.

Innovation Solution

A readout circuit with charging and discharge control modules and capacitors that generate different data and reference voltages based on discharge speeds, balancing the decision window and improving reading accuracy and reliability by utilizing a sense amplifier with input ends receiving these voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the read current is increased to enlarge the decision window, then the readout window is enlarged, but the reliability of the read unit and MTJ magnetoresistance state is affected, causing read crosstalk

Engineering Contradiction:
Improvereadout windowVSAvoidread unit reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-charging the bit line and reference bit line to specific voltages before the read operation. The charging capacitor is pre-charged to a voltage higher than the initial bit line voltage, and the reference capacitor is pre-charged to a voltage higher than the initial reference bit line voltage. This preliminary charging establishes a baseline that allows for accurate sensing without requiring excessive read current, thereby preventing read crosstalk while maintaining a sufficient decision window.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the voltage parameters dynamically during the read operation. The bit line voltage and reference bit line voltage are adjusted based on the discharge current from the capacitors. By controlling the discharge current magnitude and duration, the patent optimizes the voltage difference between the bit line and reference bit line, achieving an optimal decision window without applying excessive read current that would cause reliability issues.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the read current is decreased to improve reliability, then the reliability is improved, but the read time is prolonged

Engineering Contradiction:
Improveread unit reliabilityVSAvoidread time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent uses preliminary charging of capacitors to store energy before the read operation. This pre-stored energy in the charging capacitor and reference capacitor provides a strong initial voltage difference that accelerates the sensing process. As a result, the sense amplifier can quickly detect the voltage difference even with lower read current, reducing read time while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces capacitors as intermediary energy storage elements between the power supply and the bit line/reference bit line. These capacitors act as mediators that can deliver large amounts of charge quickly during the read operation, enabling fast reading without requiring high continuous current that would compromise reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If the reference voltage is used for comparison, then the data reading is simplified, but the reference voltage is affected by leakage from unselected memory cells and cannot be maintained at its initial level

Engineering Contradiction:
Improvedata reading simplicityVSAvoidreference voltage stability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-charging the reference capacitor to a voltage higher than the initial reference bit line voltage before the read operation. This pre-charging compensates for the expected leakage from unselected memory cells. During the read operation, even though leakage occurs, the reference voltage remains stable because it starts from a higher voltage level that accounts for the anticipated voltage drop due to leakage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses preliminary anti-action by over-charging the reference capacitor beyond the nominal reference voltage level. This excessive charging creates a voltage margin that counteracts the harmful effect of leakage current from unselected cells. The reference voltage is intentionally set higher than needed, so that after accounting for leakage, it still maintains a stable and accurate reference level for comparison.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS11087815B2Readout circuit of magnetic memory and magnetic memory
Publication Date: 2021.08.10 SEMICON MFG INT (SHANGHAI) CORP
  • US11087815B2 patent drawing
  • US11087815B2 patent drawing

AI summary

Readout circuit and magnetic memory are provided. The readout circuit includes a first charging capacitor with one end grounded and another end coupled to an output of a data unit; a first pre-charge module for charging the first charging capacitor; a first discharge control module for controlling a magnitude of a data voltage; a second charging capacitor with one end grounded and another end coupled to an output of a reference unit; a second pre-charge module for charging the second charging capacitor; a second discharge control module for controlling a magnitude of a reference voltage; and a sense amplifier for outputting readout signals.