STT MRAM Source Line Segmentation for Selectivity
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Solution Overview
Problem
In Spin Torque Transfer (STT) Magnetoresistive Random Access Memory (MRAM), the conventional source line configurations face challenges such as increased resistance and loss of cell selectivity due to narrow source lines running parallel to bit lines, and perpendicular configurations result in shared word and source lines leading to reduced selectivity.
Innovation Solution
The implementation of an STT MRAM array with source line segments spanning multiple bit lines, including an extra bit line connected to the source line segments, allows for perpendicular source line configuration while maintaining cell selectivity through a column decoder and source line driver, ensuring uniform current paths for writing and reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the source line runs parallel to the bit line, then the source line can be wide enough to maintain low resistance, but the cell selectivity is reduced due to shared word and source lines
Solution Approach 1:
The source line is divided into multiple source line segments that are distributed across different bit lines. Each segment is connected to a specific bit line, allowing the source line functionality to be segmented and assigned to different physical locations. This segmentation enables the source line to be effectively wide (low resistance) while maintaining selectivity through the column decoder that connects unselected bit lines to a common source line net.
Solution Approach 2:
The patent transitions from a two-dimensional source line configuration (parallel to bit lines) to a three-dimensional arrangement where source line segments span across multiple bit lines in the vertical dimension. The column decoder adds another dimension of control by selectively connecting bit lines to the source line, creating a multi-dimensional wiring architecture that resolves the selectivity-resistance tradeoff.
2Loss of energy
If the source line runs perpendicular to the bit line, then resistance is reduced by sharing the source line between adjacent rows, but cell selectivity is lost due to multiple bits sharing the same word line and source line
Solution Approach 1:
The column decoder acts as an intermediary between the bit lines and the source line segments. It selectively connects the selected bit line to its corresponding source line segment while connecting unselected bit lines to a common source line net. This intermediary component enables the perpendicular source line configuration to maintain both low resistance and cell selectivity by controlling which bit lines are actively connected to active source line segments during read and write operations.
3Loss of energy
If a single source line is used for multiple bit lines, then the overall resistance of the memory array is reduced, but sustained disturb voltages appear on half-selected cells
Solution Approach 1:
The source line is segmented into multiple independent source line segments, each associated with specific bit lines. The column decoder controls which segments are activated during read and write operations. This segmentation isolates the voltage disturbances to only the actively selected segment, preventing sustained disturb voltages from affecting half-selected cells while still maintaining low overall resistance through the shared source line architecture.
Solution Approach 2:
The column decoder enables periodic activation of different source line segments corresponding to different bit lines. During read and write operations, only the source line segment associated with the selected bit line is activated, while other segments remain inactive or are connected to the common source line net. This periodic, selective activation eliminates sustained disturb voltages on half-selected cells by ensuring that voltage is applied only when and where needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces resistance and enhances cell selectivity by eliminating sustained disturb voltages on half-selected cells, improving read and write uniformity and reducing the need for reference cells, resulting in area savings and improved signal integrity.
Implementation Method 1
Spin Torque Transfer (STT) Magnetoresistive Random Access Memory (MRAM) is an attractive emerging memory technology
Implementation Method 2
Magnetic Tunnel Junction (MTJ)
Data Source
AI summary
Improved STT MRAM source line configurations are provided. In one aspect, a STT MRAM array includes: a plurality of cells including magnetic tunnel junctions in series with field effect transistors; a plurality of word lines perpendicular to a plurality of bit lines; a plurality of source line segments spanning m+1 of the bit lines, wherein m of the bit lines include regular array bit lines, and wherein at least one other of the bit lines includes an extra bit line that is connected to the source line segments such that the source line segments span the regular array bit lines and the extra bit line. An STT MRAM device and a method for operating an STT MRAM device are also provided.