Stub Minimization with Offset Terminal Grids in Microelectronic Packages
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Solution Overview
Problem
Conventional microelectronic packages and assemblies face challenges in achieving compactness and efficient electrical performance due to long stub lengths between terminals, which can lead to signal degradation and increased complexity in circuit panel design and manufacturing.
Innovation Solution
The design includes a microelectronic package with a substrate having an aperture and terminals configured to reduce stub lengths by aligning first terminals carrying command-address bus signals between the aperture axis and peripheral edge, allowing for shorter electrical connections and improved signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If terminals are placed in conventional positions on the substrate, then the package structure is simple, but the stub lengths become long causing signal degradation
Solution Approach 1:
The patent applies asymmetry by offsetting the terminal grid from the center of the substrate. The terminal grid is positioned such that terminals carrying command-address bus signals are located between the aperture axis and the peripheral edge, creating an asymmetric layout that reduces stub lengths for critical signals while maintaining overall structural simplicity.
Solution Approach 2:
The patent implements local quality by differentiating terminal positions based on signal type. First terminals carrying command-address bus signals are strategically placed in a specific region between the aperture axis and peripheral edge, while other terminals are positioned differently, optimizing each region for its specific function to minimize signal degradation.
2Reliability
If terminals are repositioned to reduce stub lengths, then electrical performance improves, but manufacturing complexity increases
Solution Approach 1:
The patent segments the terminal grid into distinct regions based on signal type and routing requirements. By dividing terminals into first terminals (carrying command-address bus signals) positioned between the aperture axis and peripheral edge, and other terminals positioned differently, the design optimizes electrical performance while creating a systematic manufacturing approach.
Data Source
AI summary
A microelectronic package includes a microelectronic element having memory storage array function overlying a first surface of a substrate, the microelectronic element having a plurality of contacts aligned with an aperture in the substrate. First terminals which are configured to carry all address signals transferred to the package can be exposed within a first region of a second substrate surface, the first region disposed between the aperture and a peripheral edge of the substrate. The first terminals may be configured to carry all command signals, bank address signals and command signals transferred to the package, the command signals being write enable, row address strobe, and column address strobe.