Sub-Block Programming Voltage Control for USBD in Flash Memory

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Solution Overview

Problem

In data storage devices with sub-block mode operations, the challenge of unselected sub-block disturb (USBD) arises due to varying program-erase cycles across sub-blocks, necessitating different programming voltages to maintain reliability and prevent errors.

Innovation Solution

Implementing an adaptive programming voltage mechanism that adjusts programming voltages based on the program-erase count of individual sub-blocks, allowing for seamless operation and reducing back-to-back relocation and write amplification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a block of memory is partitioned into multiple sub-blocks with different program-erase counts, then the reliability of data storage is improved by using different programming voltages for each sub-block, but the device complexity increases due to the need to track and manage individual sub-block program-erase counts

Engineering Contradiction:

Improvedata storage reliabilityVSAvoidsub-block management complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The memory block is divided into multiple independent sub-blocks, each capable of being managed separately with its own programming voltage based on its program-erase count. This segmentation allows different parts of the memory to operate under different conditions simultaneously, improving reliability while containing complexity within manageable units.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Each sub-block is assigned a programming voltage tailored to its specific program-erase count, creating local optimization within the memory structure. Sub-blocks with higher program-erase counts receive adjusted voltages to maintain reliability, while sub-blocks with lower counts use standard voltages, thereby managing complexity through localized differentiation.

Inventive Principle:

Principle #3Local quality

2Reliability

If adaptive programming voltages are used for each sub-block based on program-erase count, then the performance and reliability are improved, but the write amplification and garbage collection overhead increase due to frequent voltage adjustments and data relocation

Engineering Contradiction:

Improvedata integrityVSAvoidwrite operation efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The programming voltage is made dynamic, automatically adjusting based on the program-erase count of each sub-block. This dynamic adaptation allows the system to maintain optimal voltage levels for reliability while minimizing unnecessary voltage changes that would cause write amplification and garbage collection overhead.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The programming voltage parameter is changed based on the program-erase count threshold. When a sub-block's program-erase count exceeds a predetermined threshold, its programming voltage is adjusted to a different level. This parameter change approach balances reliability maintenance with minimizing write operations and garbage collection frequency.

Inventive Principle:

Principle #35Parameter changes

3Device complexity

If the same programming voltage is used for all sub-blocks regardless of program-erase count, then the device complexity is reduced, but unselected sub-block disturb errors increase due to voltage mismatch in high program-erase count sub-blocks

Engineering Contradiction:

Improvevoltage management complexityVSAvoidunselected sub-block disturb errors

Core Design Contradiction:

Device complexityVSObject-affected harmful factors

Solution Approach 1:

Instead of using a uniform programming voltage for all sub-blocks, the system implements local quality by assigning different programming voltages to sub-blocks based on their individual program-erase counts. This prevents unselected sub-block disturb errors in high program-erase count sub-blocks while maintaining manageable complexity through systematic voltage assignment.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The system continuously monitors the program-erase count of each sub-block and uses this feedback information to determine the appropriate programming voltage. This feedback mechanism prevents USBD errors by adapting the programming voltage to the actual wear state of each sub-block, balancing error prevention with complexity management.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS12592288B2Data storage device and method for managing a hot count difference in sub-block mode

Publication Date: 2026.03.31 SANDISK TECHNOLOGIES LLC

AI summary

A block of memory in a data storage device can be partitioned into two or more sub-blocks, where each sub-block is independent of the other sub-blocks. If the program-erase counts of the sub-blocks are sufficiently low, the same programming voltage can be used to program each of the sub-blocks. However, for higher program-erase counts, disturb effects can create issues in using the same programming voltage. With the embodiments presented herein, the programming voltage of a given sub-block can be based on the program-erase count of the sub-block. This can avoid the need to compare program-erase counts of various sub-blocks and perform a relocation operation.