Backside-Contacted Sub-Fin Diodes for 3D IC ESD Current Paths
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Solution Overview
Problem
Designing diodes for integrated circuits that can conduct high current during electrostatic discharge (ESD) events is challenging, especially when the bulk substrate is removed, as it disrupts current conduction paths and makes it difficult to implement substrate-based diodes in 3D architectures.
Innovation Solution
The formation of a sub-fin diode with backside contacts, where a PN junction is created between differently doped portions of a sub-fin, allowing current conduction through the sub-fin and backside contacts, enabling current conduction without relying on the bulk substrate, suitable for both 2D and 3D architectures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the bulk substrate is removed to enable 3D architectures, then device stacking capability is improved, but current conduction path is disrupted
Solution Approach 1:
The patent transitions from planar substrate-based diodes to vertical sub-fin diodes by utilizing the third dimension. The sub-fin structure extends vertically from the substrate, allowing diode formation in the vertical dimension rather than relying on lateral substrate paths. This dimensional transition enables 3D stacking while maintaining current conduction through the vertical sub-fin structure and backside contacts.
Solution Approach 2:
The patent segments the diode structure into distinct components: the sub-fin region forming the PN junction and separate backside contacts for anode and cathode. This segmentation allows the diode to be formed within the sub-fin volume rather than requiring continuous substrate paths, enabling the structure to function independently of the bulk substrate and facilitating 3D integration.
2Power
If substrate-based diodes are used for high current conduction, then current carrying capability is improved, but device stacking and 3D integration are limited
Solution Approach 1:
The patent moves diode current conduction from the lateral substrate plane to the vertical dimension through sub-fin structures. Multiple sub-fin diodes can be stacked vertically, with each diode maintaining its current conduction path through its own sub-fin and backside contacts. This vertical arrangement enables both high current capability and device stacking by utilizing the third dimension for current paths.
Solution Approach 2:
The sub-fin structure acts as an intermediary between the substrate and the diode contacts. Instead of requiring direct substrate-based current paths that limit stacking, the sub-fin serves as a vertical conduit that carries current from the backside contacts through the PN junction. This intermediary structure enables current conduction without requiring lateral substrate connections, facilitating 3D integration.
3Reliability
If backside contacts are implemented for sub-fin diodes, then current conduction path is improved, but manufacturing complexity increases
Solution Approach 1:
The patent forms the sub-fin structures and their doping profiles before creating the backside contacts. The sub-fin regions are prepared with appropriate PN junction doping during earlier processing steps, and then backside contacts are added subsequently. This preliminary preparation of the sub-fin structure simplifies the overall process by establishing the current conduction path foundation before adding the contact layer.
Solution Approach 2:
The sub-fin structures serve multiple functions: they provide the vertical current conduction path, host the PN junction for diode operation, and enable backside contact integration. By making the sub-fin multi-functional, the patent reduces the need for separate dedicated structures for each function, thereby managing manufacturing complexity while achieving reliable current conduction through backside contacts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the current carrying capability of diodes during ESD events by utilizing the sub-fin as a current path, ensuring effective protection and functionality in both planar and stacked integrated circuit configurations.
Implementation Method 1
a PN junction is created between differently doped portions of a sub-fin, allowing current conduction through the sub-fin and backside contacts
Data Source
AI summary
An integrated circuit structure includes a sub-fin having at least a first portion that is doped with a first type of dopant, and a second portion that is doped with a second type of dopant. A PN junction is between the first and second portions of the sub-fin. The first type of dopant is one of a p-type or an n-type dopant, and the second type of dopant is the other of the p-type or the n-type dopant. A first contact and a second contact comprise conductive material. In an example, the first contact and the second contact are respectively in contact with the first portion and the second portion of the sub-fin. A diode is formed based on the PN junction between the first and second portions, where the first contact is an anode contact of the diode, and the second contact is a cathode contact of the diode.


