Sub-sampling Weakly-Driven Nodes With Source-Follower Buffer

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Solution Overview

Problem

Traditional on-chip sampling circuits are not suitable for sampling weakly-driven or floating nodes in semiconductor devices, as they often result in significant switching effects, high leakage currents, and clock feed-through, making it difficult to accurately monitor voltages at these nodes.

Innovation Solution

A method and apparatus for voltage sub-sampling of weakly-driven nodes, which includes isolating the signal using a source-follower amplifier to reduce leakage, employing a sample and hold circuit with master and slave pass gates, and using a biasing circuit for calibration, allowing for accurate sampling of high-frequency signals without significant distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If traditional sampler designs are used for weakly-driven nodes, then the sampling circuit can be simple, but switching effects become large compared to signal amplitude

Engineering Contradiction:
Improvesampler circuit complexityVSAvoidsignal amplitude accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

A source-follower amplifier is introduced as an intermediary buffer between the weakly-driven node and the sampling circuit. This buffer isolates the node from the sampling circuit's switching effects and leakage currents, allowing accurate sampling without directly coupling the sampler to the weak driver.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The sampling circuit is divided into multiple stages: a source-follower amplifier stage for buffering, followed by a sampling stage with master and slave pass gates. This segmentation allows each stage to be optimized independently - the buffer handles the weak signal while the sampler handles the sampling function.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If traditional sampler designs are used for weakly-driven nodes, then the sampler structure can be simple, but leakage currents become unacceptably high

Engineering Contradiction:
Improvesampler structureVSAvoidleakage current
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The source-follower amplifier acts as an intermediary that prevents direct leakage paths from the sampling circuit to the weakly-driven node. The high input impedance of the source-follower minimizes loading effects and leakage current draw from the node being sampled.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If traditional sampler designs are used for weakly-driven nodes, then the circuit can be simple, but clock feed-through effects occur

Engineering Contradiction:
Improvecircuit simplicityVSAvoidclock feed-through
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The source-follower amplifier serves as a buffer that isolates the clock signals from the weakly-driven node. The sampling operation occurs at the amplifier's output rather than directly at the node, preventing clock feed-through from contaminating the original signal source.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces switching effects and leakage currents, enabling accurate sub-sampling of weakly-driven nodes, including those involved in proximity-based communication, without the need for complex calibration circuits, and allows for the reconstruction of original waveforms at lower frequencies for testing purposes.

Implementation Method 1

Sampling a weakly-driven node may in some embodiments include isolating the signal to be sampled from diffusion regions in order to reduce degradation of the signal due to leakage. In some embodiments, this isolation may be implemented by passing the signal though a source-follower amplifier before presenting it to the input of the sample and hold circuit of the sampler.

Methodology Applied
Scientific EffectSource-follower amplifier isolation:

Implementation Method 2

The sample and hold circuit of the sampler may in some embodiments include a master pass gate and a slave pass gate, clocked on opposite phases of a sampling clock.

Methodology Applied
Scientific EffectSample and hold:

Implementation Method 3

An amplifier may convert the measured voltage to a current, which may in some embodiments be multiplied using a current mirror. The output of the sampler may be a current communicated off-chip, such as for testing purposes.

Methodology Applied
Scientific EffectVoltage to current conversion:

Implementation Method 4

The biasing circuit used may depend on the desired bias voltage. For example, a PMOS transistor may be used to bias a capacitively-driven node to a high voltage, while an NMOS transistor may be used to bias a capacitively-driven node to ground.

Methodology Applied
Scientific EffectTransistor biasing:

Data Source

PatentUS7675312B2Sub-sampling of weakly-driven nodes
Publication Date: 2010.03.09 SUN MICROSYSTEMS INC
  • US7675312B2 patent drawing
  • US7675312B2 patent drawing
  • US7675312B2 patent drawing

AI summary

A method and apparatus for performing on-chip voltage sampling of a weakly-driven node of a semiconductor device are disclosed. In some embodiments, the node is a floating node or is capacitively-driven. In some embodiments, it is involved in proximity-based communication. Sampling the node may include isolating the signal to be sampled using a source-follower amplifier before passing it to the sampling circuit. Sampling the node may include biasing the node to a desired voltage using a leaky transistor or other biasing circuit. In some embodiments, the biasing circuit may also be used to calibrate the sampler by coupling one or more calibration voltages to the node in place of a biasing voltage and measuring the sampler output. The sampler may be suitable for sub-sampling high frequency signals to produce a time-expanded, lower frequency version of the signals. The output of the sampler may be a current communicated off-chip for testing.