Sub-Word Line Drivers for Semiconductor Memory Devices
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Solution Overview
Problem
As semiconductor memory devices, such as DRAM, experience reduced dimensions and increased electrical coupling between adjacent word lines due to narrowing distances, leading to defects and performance issues.
Innovation Solution
Incorporating a sub-word line driver with separate circuits to drive word lines with different voltages, improving the disable time and coupling effect between adjacent word lines by strategically placing pull-up and pull-down transistors along the word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the distance between word lines is narrowed to increase storage density, then the storage capacity is improved, but the electrical coupling between adjacent word lines increases causing performance defects
Solution Approach 1:
The patent divides the word line driving function into multiple independent sub-word line drivers positioned at different locations along the word line. Each sub-word line driver independently controls a segment of the word line, allowing localized voltage control that reduces electrical coupling effects between adjacent word lines while maintaining high storage density.
Solution Approach 2:
The patent applies different driving voltages to different segments of the same word line through separate sub-word line drivers. By providing localized voltage control at specific positions along the word line, the system can optimize performance for each segment while minimizing interference from adjacent word lines, thus resolving the coupling issue without sacrificing storage capacity.
2Loss of time
If sub-word line drivers are positioned at both ends of the word line, then the disable time is improved, but the device complexity increases
Solution Approach 1:
The patent positions sub-word line drivers at both ends of the word line to create segmented control zones. This segmentation allows simultaneous voltage application from multiple points, significantly reducing the time required to disable the word line by creating multiple discharge paths for the capacitive load.
Solution Approach 2:
The patent combines multiple sub-word line drivers working in parallel at different positions along the word line. By merging their driving capabilities, the system achieves faster overall disable times compared to a single driver, as the combined effect creates multiple current paths for rapid voltage discharge across the entire word line length.
Data Source
AI summary
An embodiment provides a semiconductor memory device including a first word line extending along a first direction; a sub-word line driver including a first circuit and a second circuit that are connected to the first word line and are spaced apart from each other along the first direction, wherein the first circuit is configured to drive the first word line with a first voltage, and the second circuit is configured to drive the first word line with a second voltage that is different from the first voltage; and a memory cell connected to the first word line between the first circuit and the second circuit.