Sub-block Memory Read Voltage Adjustment for Current Reduction
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Solution Overview
Problem
Non-volatile memory apparatuses face challenges in reducing current draw during read operations, particularly when operating in sub-block mode, leading to increased power consumption and potential battery life issues in mobile devices.
Innovation Solution
A memory apparatus and method that divides a block of memory cells into sub-blocks, with a control circuit determining whether a particular group being read is in the second sub-block and applying an adjusted read voltage to the word lines based on the programming status of the sub-blocks, reducing current draw by using a smaller read voltage when sub-blocks are not fully programmed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a standard read voltage is applied to all word lines during read operations in sub-block mode, then all memory groups can be read uniformly, but the current draw increases unnecessarily when some sub-blocks are not programmed
Solution Approach 1:
The patent applies different read voltage levels to different sets of word lines based on the programming status of sub-blocks. When a sub-block is not programmed, a reduced read voltage is applied to its associated word lines, thereby reducing current draw while maintaining reliable read operations for programmed sub-blocks using standard voltage levels.
2Adaptability or versatility
If the memory block is divided into sub-blocks for selective programming, then programming flexibility is improved, but the complexity of voltage control increases
Solution Approach 1:
The memory block is divided into multiple sub-blocks (first sub-block and second sub-block) that can be independently programmed and read. This segmentation allows the control circuit to selectively apply different voltage levels to different sub-blocks, providing programming flexibility while managing complexity through structured organization.
Solution Approach 2:
The read voltage applied to word lines is dynamically adjusted based on the programming status of associated sub-blocks. The control circuit determines which sub-blocks are programmed and applies appropriate voltage levels (standard or reduced) accordingly, enabling adaptive power management without requiring overly complex static control structures.
3Use of energy by moving object
If reduced read voltage is applied to unprogrammed sub-blocks, then current draw is reduced, but the risk of reading errors increases
Solution Approach 1:
Different voltage levels are applied to different groups of word lines based on the local programming status of their associated sub-blocks. Programmed sub-blocks receive standard read voltage to ensure accurate data retrieval, while unprogrammed sub-blocks receive reduced voltage only when appropriate, thereby maintaining read accuracy where needed while reducing overall power consumption.
Data Source
AI summary
A memory apparatus and method of operation is provided. The apparatus includes a block of memory cells arranged in strings and connected to word lines overlying one another in a stack. The block is divided into first and second sub-blocks programmed as a whole in a sub-block mode and includes a particular group connected to a particular word line. A control circuit determines whether the particular group being read is in the second sub-block when operating in the sub-block mode. The control circuit also determines whether one of the first and second sub-blocks is not programmed based on whether the particular group being read is in the second sub-block. The control circuit applies an adjusted read voltage to the word lines of the one of the first and second sub-blocks while reading the particular group based on whether the one of the first and second sub-blocks is not programmed.