Sub-Pixel Via Layout for Larger Emission Area in Displays
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Solution Overview
Problem
Current display technologies face challenges in achieving reliable and efficient light emission due to limitations in the arrangement and connectivity of sub-pixels, which affect the emission area and light source effectiveness.
Innovation Solution
The proposed solution involves a pixel configuration with specific arrangements of sub-pixels, including a first, second, and third sub-pixel, each with a pixel circuit layer, alignment electrodes, and a floating pattern, where via holes expose regions of the upper electrode, power lines, and floating pattern, enhancing electrical connections and light emission efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If sub-pixels are arranged in a conventional configuration, then the device complexity is reduced, but the emission area and light source effectiveness deteriorate
Solution Approach 1:
The pixel is divided into three distinct sub-pixels (first, second, and third sub-pixels) with different electrode arrangements. Each sub-pixel contains specific via holes (first, second, third via holes) that expose different regions (upper electrode, power line, floating pattern), allowing independent optimization of emission characteristics for each segment while maintaining overall pixel functionality.
Solution Approach 2:
Different regions within each sub-pixel are assigned different functional qualities through selective via hole placement. The first via hole exposes the upper electrode region for primary emission, the second via hole exposes the power line region for electrical connection, and the third via hole exposes the floating pattern region for field control, creating locally optimized emission zones that collectively enhance overall light source effectiveness.
2Reliability
If via holes are positioned to expose different regions, then electrical connections and light emission efficiency are improved, but manufacturing precision requirements increase
Solution Approach 1:
The via holes are arranged in a systematic three-dimensional configuration across multiple layers. The first, second, and third via holes are positioned at different lateral positions and depths, exposing different structural regions (upper electrode, power line, floating pattern). This multi-dimensional arrangement ensures reliable electrical connections while distributing the precision requirements across standardized fabrication patterns that can be consistently manufactured.
3Productivity
If the upper electrode region is exposed through via holes, then light emission efficiency is improved, but the complexity of the pixel circuit layer increases
Solution Approach 1:
The upper electrode region, when exposed through the first via hole, serves multiple functions: it acts as the primary light emission surface, provides electrical connection to the light emitting element, and contributes to the overall electrical field distribution. This multi-functionality allows the same structural element to enhance light emission efficiency without requiring additional separate components, thereby limiting the increase in pixel circuit layer complexity.
Data Source
AI summary
A pixel may include a first sub-pixel, a third sub-pixel, and a second sub-pixel that are arranged in a second direction and each include an emission area and a non-emission area. Each of the first, second, and third sub-pixels may include: a pixel circuit layer including a passivation layer including first to third via holes; a first alignment electrode disposed on the passivation layer; a second alignment electrode spaced apart from the first alignment electrode; a floating pattern spaced apart from the first alignment electrode; a light emitting element disposed between the first alignment electrode and the second alignment electrode. A first via hole of the first sub-pixel, a first via hole of the third sub-pixel, and a first via hole of the second sub-pixel may be positioned in a same column.