Sub-processor Address Translation for Immediate Data Transfer
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Solution Overview
Problem
Existing information processing devices face challenges in achieving immediate and stable data transfer performance to I/O devices, such as NICs, due to the need for a new address translation table to be created before data transfer can occur, which delays the process.
Innovation Solution
An information processing device with a memory, main processor, sub-processors, and address translation table sharing means allows for immediate data transfer by enabling sub-processors to receive transfer requests, translate logical addresses to physical addresses, and execute data transfer processes directly to I/O devices using a shared address translation table, thereby bypassing the need for immediate address translation setup.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated hardware is provided for data transfer at the I/O device side, then data transfer performance is stabilized, but address translation table setup time increases
Solution Approach 1:
The address translation table is created and stored in advance in the main processor before data transfer is needed. When a data transfer request is made, the sub-processor can immediately use this pre-prepared table without delay, thus resolving the contradiction between having dedicated hardware for stable transfer performance and avoiding setup time delays.
Solution Approach 2:
The invention introduces a sub-processor as an intermediary between the main processor and the I/O device. This sub-processor has direct access to the pre-created address translation table and can perform data transfer operations independently, eliminating the need for the main processor to be involved in each transfer operation while maintaining fast access to translation information.
2Productivity
If the processor executes another program while transferring data, then processor utilization is improved, but data transfer performance deteriorates
Solution Approach 1:
The processor system is segmented into a main processor for executing programs and a sub-processor for handling data transfer operations. This segmentation allows the main processor to focus on program execution while the sub-processor independently manages data transfer, thus maintaining both high processor utilization and stable data transfer performance simultaneously.
Solution Approach 2:
The sub-processor is equipped with the address translation table and can perform data transfer operations autonomously without requiring the main processor's involvement. This self-service capability enables the data transfer function to operate independently, ensuring stable transfer performance even when the main processor is busy executing other programs.
Data Source
AI summary
The present invention has been conceived in view of the above described situation, and an object of the invention is to provide an information processing device, data transfer method and information storage medium that can commence data transfer to an I/O device immediately, and can stably exhibit data transfer performance. In an information processing device provided with hardware for sharing an address translation table, for translating logical addresses of a memory to physical addresses, between a main processor and a sub-processor, one of the sub-processors is caused to function as means for receiving a transfer request designating a logical address of the memory, means for translating the logical address that has been designated in the transfer request to a physical address using the shared address translation table, and means for executing transfer processing for data stored in the memory 14 according to the translated physical address.