Substrate-Bias Potential Circuit for Stable Delay Timing
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Solution Overview
Problem
Existing delay circuits in semiconductor elements, such as those used in DRAM, face challenges in maintaining precise delay control due to significant changes in delay time (T) with variations in supply voltage, operating temperature, and manufacturing process, impacting precision.
Innovation Solution
A potential generating circuit comprising a first and second transistor, where the potential at the substrate of each transistor varies with supply voltage, operating temperature, or manufacturing process, allowing for adjusted current flow through inverters to compensate for these changes, thereby minimizing the impact on delay time precision.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional delay circuits are used, then delay function is provided, but delay time changes greatly with supply voltage, operating temperature, and manufacturing process
Solution Approach 1:
The patent changes the substrate potential parameter of transistors to compensate for delay variations. By adjusting the substrate potential in response to changes in supply voltage, temperature, or manufacturing process variations, the circuit maintains stable delay characteristics despite external parameter changes.
Solution Approach 2:
The patent implements a feedback mechanism where the substrate potential is dynamically adjusted based on detected changes in operating conditions. This feedback loop compensates for variations in delay time caused by supply voltage fluctuations, temperature changes, or manufacturing process deviations.
2Measurement precision
If delay circuit is used in DRAM, then precise delay control is required, but delay changes with process, voltage, and temperature variations
Solution Approach 1:
The patent modifies the substrate potential parameter to counteract the harmful effects of parameter variations. By changing the substrate potential in response to voltage, temperature, or process variations, the circuit maintains precise delay control required for DRAM operations.
Solution Approach 2:
The patent converts the harmful effect of parameter variations into a beneficial compensation mechanism. The substrate potential adjustment uses the information from parameter changes to generate compensating signals that restore delay precision, turning the harmful variations into an opportunity for active compensation.
Data Source
AI summary
A potential generating circuit includes a first transistor and a second transistor. Potential at a substrate of the first transistor varies with a first parameter. The first parameter is any one of a supply voltage, an operating temperature, as well as a manufacturing process of the potential generating circuit. Potential at a substrate of the second transistor varies with the first parameter. A gate of the first transistor is connected to a drain of the first transistor. The substrate of the first transistor serves as a first output of the potential generating circuit. A gate of the second transistor is connected to a drain of the second transistor. The substrate of the second transistor serves as a second output of the potential generating circuit.