Array Substrate Border Reduction via GOA Circuit Relocation
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Solution Overview
Problem
Conventional LCD panel technologies face challenges in achieving ultra-narrow border designs due to limitations in reducing the border size while maintaining effective GOA circuit reliability and insulation among signal lines, especially for small-size panels like 4-7 inch cell phone displays.
Innovation Solution
The solution involves an array substrate with an active area and a non-active area, where the active area has intersecting scan and data lines forming pixel units, and the non-active area contains a driving circuit disposed along the extension direction of the data lines to minimize the non-active area size, thereby achieving a narrower border. This configuration allows for the realization of ultra-narrow border designs in display devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the border size is reduced to achieve ultra-narrow border design, then the border width decreases, but the GOA circuit reliability and signal line insulation deteriorate
Solution Approach 1:
The patent repositions the driving circuit from the traditional lateral border region to the bottom border region, utilizing the extension direction of data lines. This dimensional reconfiguration allows the driving circuit to be disposed along the data line extension direction, effectively reducing the lateral border width to 0.1mm-0.3mm while maintaining adequate space for reliable GOA circuits in the bottom border area.
2Length of stationary object
If the GOA circuit area is reduced to narrow the border, then the border width decreases, but the circuit effectiveness and mutual insulation deteriorate
Solution Approach 1:
The patent relocates the driving circuit to the bottom border region along the data line extension direction, creating sufficient space for proper circuit layout and signal line insulation. This dimensional shift enables the lateral border to be narrowed to 0.1mm-0.3mm while the bottom border accommodates the GOA circuit with adequate spacing for manufacturing reliability.
3Area of stationary object
If the non-active area size is reduced, then the border size narrows, but the driving circuit layout becomes more constrained
Solution Approach 1:
The patent positions the driving circuit to extend along the data line direction in the bottom border region, utilizing the length dimension provided by the data line extension. This allows the non-active area to be minimized in the lateral direction (achieving 0.1mm-0.3mm border) while providing sufficient linear space along the data line extension for the driving circuit components and connections.
Data Source
AI summary
A display device, array substrate and manufacturing method thereof are provided. The array substrate includes an active area and a non-active area, and the active area includes a plurality of scan lines and a plurality of data lines intersecting with the plurality of scan lines, and a plurality of pixel units formed by the intersecting plurality of scan lines and plurality of data lines; the non-active area includes a driving circuit providing scan signals to the scan lines, and the driving circuit is located along an extension direction of the data lines so as to reduce area size of the non-active area along an extension direction of the scan lines to achieve narrowing border size. As such, the ultra-narrow border for display device is achieved.


