Semiconductor Package Substrate Cavity Formation Burr Prevention
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Solution Overview
Problem
The existing manufacturing process for semiconductor package substrates results in low yield and low throughput due to the formation of burrs on the periphery of cavities during the cutting of plating wires with milling cutters, which are ineffective to remove and persist in the router process.
Innovation Solution
A method involving a non-plating line process where a conductive layer is formed on the circuit board, resist layers are applied to expose the electrically connecting pads and free area, a metal protecting layer is electroplated, and the free area is directly cut using machine cutters to form a cavity, avoiding the cutting of plating wires and thus preventing burrs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If plating wires are cut with milling cutters to form cavities, then the cavity structure is formed, but burrs are generated on the periphery reducing yield
Solution Approach 1:
The patent applies preliminary action by forming the metal protecting layer on the plating wires before the cavity cutting process. This protective layer is prepared in advance to prevent burr formation during subsequent cutting operations, thereby maintaining both cavity formation quality and production yield
2Ease of manufacture
If plating wires are cut with milling cutters, then cavity is formed, but burrs persist and reduce throughput
Solution Approach 1:
The patent converts the potentially harmful cutting process into a beneficial operation by introducing a metal protecting layer that prevents burr formation. This allows the milling cutter to effectively form cavities without generating problematic burrs that would require additional removal steps, thereby improving manufacturing throughput
3Reliability
If metal protecting layer is formed by electroplating, then pad protection is achieved, but plating wires must be laid increasing process complexity
Solution Approach 1:
The patent applies universality by making the metal protecting layer serve multiple functions: it protects the electrically connecting pads from oxidation and also prevents burr formation during cavity cutting. This multi-functionality eliminates the need for separate protective measures for plating wires, reducing overall process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases production yield by eliminating burrs and improving the throughput of the semiconductor package substrate manufacturing process by avoiding the cutting of plating wires, enhancing the effectiveness of the cavity formation process.
Implementation Method 1
a nickel/gold layer is formed on the surfaces of the electrically connecting pads such that during a wire bonding operation electrical coupling of the gold wires and the electrically connecting pads is achieved
Data Source
AI summary
A method for manufacturing a semiconductor package is proposed. A circuit board with a circuit layer on at least one surface thereof is provided. The circuit board has at least one free area, and the circuit layer has a plurality of electrically connecting pads distributed on the periphery of the free area. A metal protecting layer is plated on the electrically connecting pads by non-plating line. The free area is removed, to form a cavity penetrating the circuit board. The present invention prevents burrs which may otherwise form on the periphery of a cavity, to increase the yield and throughput.