Semiconductor Package Substrate Extensions for Dense Optical-Electrical I/O
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Solution Overview
Problem
Existing semiconductor device packaging methods face challenges in efficiently accommodating both electrical and optical interconnects, leading to increased complexity, parasitic losses, and limited connection density, which are inadequate for high-performance computing systems.
Innovation Solution
The integration of substrate extensions with electrical and optical connections, allowing for customized base substrates that support both types of interconnects, reducing signal routing through the module and motherboard, and optimizing connection density without increasing module size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional semiconductor device packaging methods are used to accommodate both electrical and optical interconnects, then connection density is limited, but device complexity and parasitic losses increase
Solution Approach 1:
The packaging structure is segmented into distinct electrical interconnect regions and optical interconnect regions, allowing each type of connection to be optimized independently while maintaining high overall connection density. The substrate is divided into multiple connection areas that can be separately configured for electrical or optical connections.
Solution Approach 2:
The patent utilizes three-dimensional packaging arrangements and vertical stacking to increase connection density without proportionally increasing the footprint area. Multiple interconnect layers are stacked vertically, allowing high-density connections in a compact form factor while reducing routing complexity.
2Length of stationary object
If signal routing is extended through the module and motherboard, then connection reach is improved, but parasitic losses and power consumption increase
Solution Approach 1:
The patent introduces intermediate connection structures and localized routing paths that serve as mediators between computational modules, reducing the need for long-distance signal routing through the entire motherboard. Signal paths are optimized to terminate at nearby interconnect points, minimizing parasitic losses.
3Quantity of substance
If module size is increased to accommodate more interconnects, then connection density is improved, but system scalability is limited
Solution Approach 1:
The packaging structure is designed with universal interconnect interfaces that can accommodate both electrical and optical connections using the same fundamental substrate architecture. This multi-functional design allows the same module format to support different interconnect configurations, enabling system scalability without requiring multiple module sizes.
Solution Approach 2:
The interconnect configuration is made dynamic and reconfigurable, allowing the system to adapt the number and type of connections based on computational needs. The packaging supports flexible routing and configurable connection patterns that can be adjusted without changing the physical module size.
Data Source
AI summary
The present invention is directed to semiconductor devices and packages. According to an exemplary embodiment, one or more substrate extensions are coupled to a base substrate, with portions of one or more substrates extending beyond the base substrate. Electrical and/or optical connections are connected to these substrate extensions. There are additional embodiments as well.