Semiconductor Substrate Cavity Filling to Reduce CTE Warpage
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Solution Overview
Problem
The increasing integration of electronic components in semiconductor chips leads to warpage issues due to coefficient of thermal expansion (CTE) mismatch between filling materials and electronic components, affecting the reliability of semiconductor substrate structures.
Innovation Solution
A semiconductor substrate structure is designed with a substrate, electronic device, and filling material, where the substrate defines a cavity with a gap and a dielectric layer that includes an extending portion engaged with a protrusion of the filling material, optimizing the CTE mismatch and improving adhesion between the filling material, electronic device, and substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If filling materials are used to fill gaps between electronic components and substrate, then gaps are filled and components are secured, but warpage occurs due to CTE mismatch between filling materials and electronic components
Solution Approach 1:
A dielectric layer is introduced as an intermediary between the filling material and the electronic device. This dielectric layer has intermediate CTE properties that bridge the gap between the high-CTE filling material and the low-CTE electronic device, reducing thermal expansion mismatch and preventing warpage while maintaining structural stability
Solution Approach 2:
The patent uses composite material structure where a dielectric layer is combined with filling material to create a multi-layer filling structure. This composite approach allows optimization of thermal expansion properties by combining materials with different CTE characteristics, reducing overall warpage while maintaining mechanical support
2Quantity of substance
If filling material is applied into the gap, then the gap is filled, but delamination may occur due to poor adhesion between filling material and electronic device
Solution Approach 1:
The dielectric layer serves as an intermediary bonding layer between the filling material and the electronic device. This intermediate layer provides superior adhesion properties, ensuring strong bonding while allowing the filling material to completely fill the gap without causing delamination
Solution Approach 2:
The patent changes the material parameters by selecting a dielectric layer with specific adhesion properties that are optimized for bonding to both the filling material and the electronic device. This parameter optimization ensures strong interfacial adhesion and prevents delamination while maintaining complete gap filling
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces warpage and enhances the reliability of the semiconductor substrate structure by improving adhesion and bonding strength, while simplifying the manufacturing process for conductive vias and reducing delamination issues.
Implementation Method 1
a flow rate of the filling material at the first inlet end is greater than a flow rate of the filling material at the second inlet end
Data Source
AI summary
A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.