Substrate Structure with High-Density Wiring and Manufacturing Method
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Solution Overview
Problem
The challenge is to develop a circuit board structure that matches the decreasing size of semiconductor chips with fine circuitry and high density without significantly increasing manufacturing costs, while ensuring efficient and reliable electrical signal transmission.
Innovation Solution
A substrate structure comprising high-wiring-density, middle-wiring-density, and low-wiring-density redistribution circuitries, where the high-wiring-density circuitry directly connects to the semiconductor chip, and the middle-wiring-density circuitry acts as an intermediary between the high and low-wiring-density circuitries, simplifying the package substrate and interposer structure for improved electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional package substrate and interposer structure is used, then manufacturing is simpler, but the structure is more complex and electrical signal transmission is slower
Solution Approach 1:
The patent extracts and eliminates the interposer component from the conventional package substrate structure. By directly connecting the semiconductor chip to the package substrate through redistribution circuitry, the interposer is removed, simplifying the overall structure while improving electrical signal transmission performance and reducing manufacturing complexity
Solution Approach 2:
The patent merges the functions of the interposer and package substrate into a single integrated structure. The redistribution circuitry is directly formed on the package substrate, combining what were previously separate components (interposer + substrate) into one unified structure, thereby reducing device complexity and improving electrical performance
2Volume of moving object
If the semiconductor chip size is decreased to achieve high density, then electronic products become thinner and smaller, but manufacturing costs increase significantly
Solution Approach 1:
The patent applies local quality by creating redistribution circuitry with different wiring densities in different regions. The first redistribution circuitry has a first wiring density matching the semiconductor chip area, while the second redistribution circuitry has a second wiring density in the extended area. This allows the structure to accommodate smaller chip sizes for high density applications while maintaining manufacturability through localized density optimization
Solution Approach 2:
The patent extends the redistribution circuitry into a second area that protrudes from the first area in a planar direction. This dimensional extension allows the circuit board structure to match the decreased chip size and achieve high density packaging without significantly increasing manufacturing costs, as the extended area can use standard manufacturing processes
Data Source
AI summary
A substrate structure, for connecting a semiconductor chip, including a high-density redistribution layer (RDL), a low-density RDL, and a middle-density RDL. The high-density RDL includes a fine conductive pattern. The semiconductor chip is disposed on the high-density RDL. The low-density RDL includes a coarse conductive pattern, and is disposed below the high-density RDL and away from the semiconductor chip. A layout density of the fine conductive pattern is denser than that of the coarse conductive pattern. The middle-density RDL is interposed between and electrically connected between the high-density and low-density RDLs. The middle-density RDL includes a middle dielectric layer, a middle conductive pattern disposed on the middle dielectric layer and close to the high-density RDL, and a middle conductive via penetrating the middle dielectric layer and including a top end connected to the middle conductive pattern and a bottom end protruding from a bottom surface of the middle dielectric layer.