Package Substrates with Integrated Transistors and Capacitors

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Solution Overview

Problem

Traditional package substrates require embedding prefabricated dies, sensors, or capacitors, which increases cost and process complexity, and suffer from performance losses due to capacitors being spaced far from transistors.

Innovation Solution

Integrating transistors and capacitors directly into the package substrate using existing processes, allowing for substrate-integrated logic and reducing the need for separate components, with capacitors formed on the same layer as transistors to mitigate performance losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If prefabricated dies, sensors, or capacitors are embedded in the package substrate, then device functionality is enhanced, but assembly cost and process complexity increase

Engineering Contradiction:
Improvedevice functionalityVSAvoidassembly process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the substrate and device into a single integrated structure where the package substrate includes integrated circuitry formed directly on the substrate. This eliminates the need to embed separate prefabricated components, thereby reducing assembly process complexity while maintaining enhanced device functionality through integration.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The package substrate is designed to perform multiple functions: it serves as both the structural base and the functional device platform. The substrate includes integrated circuitry that can perform logic operations, memory functions, or other computational tasks, making the substrate itself multi-functional rather than merely a passive mounting platform.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If capacitors are spaced far from transistors on the package substrate, then routing flexibility is improved, but performance is degraded

Engineering Contradiction:
Improverouting flexibilityVSAvoiddevice performance
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent utilizes three-dimensional integration within the substrate, allowing capacitors and transistors to be positioned in different layers or vertical levels of the substrate structure. This enables close proximity placement for optimal performance while maintaining routing flexibility through vertical interconnects rather than horizontal spacing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If logic is integrated into the package substrate, then computing density increases, but manufacturing complexity increases

Engineering Contradiction:
Improvecomputing densityVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The integrated circuitry is formed on the substrate using standard semiconductor fabrication processes before the substrate is assembled into the final package. This preliminary formation of logic structures allows for high computing density while utilizing existing, well-established manufacturing techniques rather than requiring new complex assembly processes.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10790233B2Package substrates with integral devices
Publication Date: 2020.09.29 INTEL CORP
  • US10790233B2 patent drawing
  • US10790233B2 patent drawing
  • US10790233B2 patent drawing

AI summary

Disclosed herein are package substrates with integrated components, as well as related apparatuses and methods. For example, in some embodiments, an integrated circuit (IC) package, may include: a substrate having opposing first and second faces, an insulating material disposed between the first and second faces, and a thin film transistor (TFT) disposed between the first and second faces, wherein a conductive portion of the TFT is disposed on a layer of the insulating material, and the conductive portion of the TFT is a gate, source, or drain of the TFT; and a die coupled to the first face of the substrate.