Substrate-less Stackable Package Wire-Bond Interconnect
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Solution Overview
Problem
Current microelectronic packaging technologies face limitations in efficiently forming and testing microelectronic units with complex interconnect structures, particularly in achieving high-speed operations and compact sizes while ensuring reliable mechanical and electrical connections.
Innovation Solution
A method involving the formation of wire bonds on a conductive layer with dielectric encapsulation, followed by selective patterning and removal of conductive elements to create insulated connections, allowing for the integration of microelectronic elements and redistribution layers to facilitate efficient electrical connections and compact packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If traditional substrate-based packaging is used, then mechanical support and electrical connection are provided, but device size and interconnection distance are increased
Solution Approach 1:
The patent extracts and removes the traditional substrate from the packaging structure, creating a substrate-less package. The semiconductor device is directly mounted on a support structure with conductive elements, eliminating the intermediate substrate layer. This extraction reduces package size and interconnection distance while maintaining mechanical support and electrical connection functions through the integrated support structure and conductive elements.
Solution Approach 2:
The patent merges the support structure and electrical connection elements into a single integrated component. The support structure incorporates conductive elements that provide both mechanical support and electrical connection functions simultaneously, eliminating the need for separate substrate and connection elements. This merging reduces overall package size and simplifies the interconnection path.
2Speed
If solder balls are used for interconnection, then electrical connection is achieved, but signal propagation time increases due to longer interconnection distance
Solution Approach 1:
The patent extracts and eliminates the traditional solder ball interconnection method, replacing it with direct wire bonding or conductive element connection. This removal of the solder ball layer significantly shortens the interconnection distance between the semiconductor device and the support structure, thereby reducing signal propagation time and increasing signal speed.
3Reliability
If complex interconnect structures are formed, then electrical connection reliability is improved, but manufacturing complexity and testing difficulty increase
Solution Approach 1:
The patent performs preliminary formation of conductive elements and support structure before mounting the semiconductor device. The conductive elements are pre-positioned and configured on the support structure, allowing for simplified subsequent assembly steps. This preliminary action ensures reliable electrical connections while reducing overall manufacturing complexity by organizing complex interconnect formation into a preparatory stage.
Solution Approach 2:
The patent introduces a support structure as an intermediary element that simplifies the formation of complex interconnect structures. The support structure provides a organized framework for positioning conductive elements, making the manufacturing process more manageable. This intermediary structure mediates between the semiconductor device and the final interconnect configuration, reducing testing and manufacturing difficulty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the creation of compact, high-speed microelectronic packages with reliable electrical connections, enhancing operational efficiency and reducing signal propagation time by allowing for short interconnections between devices.
Implementation Method 1
wire bonds having bases joined to the first surface and end surfaces remote from the bases
Implementation Method 2
forming a dielectric encapsulation layer over at least a portion of the first surface of the conductive layer and over portions of the wire bonds
Data Source
AI summary
A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are uncovered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.


